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参数资料
| 型号： | ST6252CN3/XXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO16 |
| 封装： | PLASTIC, SSOP-16 |
| 文件页数： | 39/75页 |
| 文件大小： | 1753K |
| 代理商： | ST6252CN3/XXX |
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ST6252C ST6262B ST6262C
AUTO-RELOAD TIMER (Cont’d)
It should be noted that the reload values will also
affect the value and the resolution of the duty cycle
of PWM output signal. To obtain a signal on ARTI-
Mout, the contents of the ARCP register must be
greater than the contents of the ARRC register.
The maximum available resolution for the ARTI-
Mout duty cycle is:
Resolution = 1/[256-(ARRC)]
Where ARRC is the content of the Reload/Capture
register. The compare value loaded in the Com-
pare Register, ARCP, must be in the range from
(ARRC) to 255.
The ARTC counter is initialized by writing to the
ARRC register and by then setting the TCLD (Tim-
er Load) and the TEN (Timer Clock Enable) bits in
the Mode Control register, ARMC.
Enabling and selection of the clock source is con-
trolled by the CC0, CC1, SL0 and SL1 bits in the
Status Control Register, ARSC1. The prescaler di-
vision ratio is selected by the PS0, PS1 and PS2
bits in the ARSC1 register.
In Auto-reload Mode, any of the three available
clock sources can be selected: Internal Clock, In-
ternal Clock divided by 3 or the clock signal
present on the ARTIMin pin.
Figure 28. Auto-reload Timer PWM Function
COUNTER
COMPARE
VALUE
RELOAD
REGISTER
PWM OUTPUT
t
255
000
VR001852
tHIGH
tLOW
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