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参数资料
| 型号： | ST6265C |
| 英文描述： | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. A/D CONVERTER. SAFE RESET. AUTO-RELOAD TIMER. EEPROM AND SPI |
| 中文描述： | 8位微控制器（MCU）的与检察官办公室。光盘。 FASTROM。存储器。的A / D转换器。安全复位。自动重加载定时器。的EEPROM和SPI |
| 文件页数： | 13/84页 |
| 文件大小： | 918K |
| 代理商： | ST6265C |
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13/84
ST62T53C/T60C/T63C ST62E60C
MEMORY MAP
(Cont’d)
Additional Notes on Parallel Mode:
If the user wishes to perform parallel program-
ming, the first step should be to set the E2PAR2
bit. From this time on, the EEPROM will be ad-
dressed in write mode, the ROW address and the
data will be latched and it will be possible to
change them only at the end of the programming
cycle or by resetting E2PAR2 without program-
ming the EEPROM. After the ROW address is
latched, the MCU can only “see” the selected
EEPROM row and any attempt to write or read
other rows will produce errors.
The EEPROM should not be read while E2PAR2
is set.
As soon as the E2PAR2 bit is set, the 8 volatile
ROW latches are cleared. From this moment on,
the user can load data in all or in part of the ROW.
Setting E2PAR1 will modify the EEPROM regis-
ters corresponding to the ROW latches accessed
after E2PAR2. For example, if the software sets
E2PAR2 and accesses the EEPROM by writing to
addresses 18h, 1Ah and 1Bh, and then sets
E2PAR1, these three registers will be modified si-
multaneously; the remaining bytes in the row will
be unaffected.
Note that E2PAR2 is internally reset at the end of
the programming cycle. This implies that the user
must set the E2PAR2 bit between two parallel pro-
gramming cycles. Note that if the user tries to set
E2PAR1 while E2PAR2 is not set, there will be no
programming cycle and the E2PAR1 bit will be un-
affected. Consequently, the E2PAR1 bit cannot be
set if E2ENA is low. The E2PAR1 bit can be set by
the user, only if the E2ENA and E2PAR2 bits are
also set.
Notes
: The EEPROM page shall not be changed
through the DRBR register when the E2PAR2 bit
is set.
EEPROM Control Register (EECTL
)
Address: EAh
—
Reset status: 00h
Read/Write
Bit 7 =
D7
:
Unused.
Bit 6 =
E2OFF
:
Stand-by Enable Bit.
WRITE ONLY.
If this bit is set the EEPROM is disabled (any access
will be meaningless) and the power consumption of
the EEPROM is reduced to its lowest value.
Bit 5-4 =
D5-D4
:
Reserved.
MUST be kept reset.
Bit 3 =
E2PAR1
:
Parallel Start Bit.
WRITE ONLY.
Once in Parallel Mode, as soon as the user software
sets the E2PAR1 bit, parallel writing of the 8 adja-
cent registers will start. This bit is internally reset at
the end of the programming procedure. Note that
less than 8 bytes can be written if required, the un-
defined bytes being unaffected by the parallel pro-
gramming cycle; this is explained in greater detail in
the Additional Notes on Parallel Mode overleaf.
Bit 2 =
E2PAR2
:
Parallel Mode En. Bit.
WRITE
ONLY. This bit must be set by the user program in
order to perform parallel programming. If E2PAR2
is set and the parallel start bit (E2PAR1) is reset,
up to 8 adjacent bytes can be written simultane-
ously. These 8 adjacent bytes are considered as a
row, whose address lines A7, A6, A5, A4, A3 are
fixed while A2, A1 and A0 are the changing bits, as
illustrated in
Table 4
. E2PAR2 is automatically re-
set at the end of any parallel programming proce-
dure. It can be reset by the user software before
starting the programming procedure, thus leaving
the EEPROM registers unchanged.
Bit 1 =
E2BUSY
:
EEPROM Busy Bit.
READ ON-
LY. This bit is automatically set by the EEPROM
control logic when the EEPROM is in program-
ming mode. The user program should test it before
any EEPROM read or write operation; any attempt
to access the EEPROM while the busy bit is set
will be aborted and the writing procedure in
progress will be completed.
Bit 0 =
E2ENA
:
EEPROM Enable Bit.
WRITE ON-
LY. This bit enables programming of the EEPROM
cells. It must be set before any write to the EEP-
ROM register. Any attempt to write to the EEP-
ROM when E2ENA is low is meaningless and will
not trigger a write cycle.
The EEPROM is disabled as soon as a STOP in-
struction is executed in order to achieve the lowest
power-consumption.
7
0
D7
E2O
FF
D5
D4
E2PA
R1
E2PA
R2
E2BU
SY
E2E
NA
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST626X | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8/16-Bit Micros |
| ST626XC-KIT | 制造商:STMicroelectronics 功能描述:ST625X, 6X KIT - Bulk |
| ST626XC-KIT/EU | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:DEVELOPMENT KIT ST626 EURO |
| ST626XC-KIT/UK | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:ST62 KIT |
| ST626XC-KIT/US | 功能描述:开发板和工具包 - 其他处理器 ST626X Starter Kit RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
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