参数资料
型号: ST62T25CB6/XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP28
封装: 0.600 INCH, PLASTIC, DIP-28
文件页数: 26/105页
文件大小: 1003K
代理商: ST62T25CB6/XXX
ST6215C/ST6225C
27/105
6 INTERRUPTS
The ST6 core may be interrupted by four maska-
ble interrupt sources, in addition to a Non Maska-
ble Interrupt (NMI) source. The interrupt process-
ing flowchart is shown in Figure 18.
Maskable interrupts must be enabled by setting
the GEN bit in the IOR register. However, even if
they are disabled (GEN bit = 0), interrupt events
are latched and may be processed as soon as the
GEN bit is set.
Each source is associated with a specific Interrupt
Vector, located in Program space (see Interrupt
Mapping table). In the vector location, the user
must write a Jump instruction to the associated in-
terrupt service routine.
When an interrupt source generates an interrupt
request, the PC register is loaded with the address
of the interrupt vector, which then causes a Jump
to the relevant interrupt service routine, thus serv-
icing the interrupt.
Interrupts are triggered by events either on exter-
nal pins, or from the on-chip peripherals. Several
events can be ORed on the same interrupt vector.
On-chip peripherals have flag registers to deter-
mine which event triggered the interrupt.
1
相关PDF资料
PDF描述
ST62T25CN6/XXX 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDSO28
ST62T15CB3/XXX 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP28
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