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参数资料
型号： ST62T65CM6
英文描述： IC-SM-8-BIT MCU 4K OTP
中文描述： 集成电路钐8位微控制器4K的检察官办公室
文件页数： 52/82页
文件大小： 870K
代理商： ST62T65CM6
52/82
ST62T18C/E18C
A/D CONVERTER
(Cont’d)
Since the ADC is on the same chip as the micro-
processor, the user should not switch heavily load-
ed output signals during conversion, if high preci-
sion is required. Such switching will affect the sup-
ply voltages used as analog references.
The accuracy of the conversion depends on the
quality of the power supplies (V
DD
and V
SS
). The
user must take special care to ensure a well regu-
lated reference voltage is present on the V
DD
and
V
SS
pins (power supply voltage variations must be
less than 5V/ms). This implies, in particular, that a
suitable decoupling capacitor is used at the V
DD
pin.
The converter resolution is given by:
V
–
256
The Input voltage (Ain) which is to be converted
must be constant for 1μs before conversion and
remain constant during conversion.
Conversion resolution can be improved if the pow-
er supply voltage (V
DD
) to the microcontroller is
lowered.
In order to optimise conversion resolution, the user
can configure the microcontroller in WAIT mode,
because this mode minimises noise disturbances
and power supply variations due to output switch-
ing. Nevertheless, the WAIT instruction should be
executed as soon as possible after the beginning
of the conversion, because execution of the WAIT
instruction may cause a small variation of the V
DD
voltage. The negative effect of this variation is min-
imized at the beginning of the conversion when the
converter is less sensitive, rather than at the end
of conversion, when the less significant bits are
determined.
The best configuration, from an accuracy stand-
point, is WAIT mode with the Timer stopped. In-
deed, only the ADC peripheral and the oscillator
are then still working. The MCU must be woken up
from WAIT mode by the ADC interrupt at the end
of the conversion. It should be noted that waking
up the microcontroller could also be done using
the Timer interrupt, but in this case the Timer will
be working and the resulting noise could affect
conversion accuracy.
One extra feature is available in the ADC to get a
better accuracy. In fact, each ADC conversion has
to be followed by a WAIT instruction to minimize
the noise during the conversion. But the first con-
version step is performed before the execution of
the WAIT when most of clocks signals are still en-
abled . The key is to synchronize the ADC start
with the effective execution of the WAIT. This is
achieved by setting ADC SYNC option. This way,
ADC conversion starts in effective WAIT for maxi-
mum accuracy.
Note: With this extra option, it is mandatory to ex-
ecute WAIT instruction just after ADC start instruc-
tion. Insertion of any extra instruction may cause
spurious interrupt request at ADC interrupt vector.
A/D Converter Control Register (ADCR)
Address: 0D1h
—
Read/Write
Bit 7 =
EAI
:
Enable A/D Interrupt.
If this bit is set to
“1” the A/D interrupt is enabled, when EAI=0 the
interrupt is disabled.
Bit 6 =
EOC
:
End of conversion.
Read Only
. This
read only bit indicates when a conversion has
been completed. This bit is automatically reset to
“0” when the STA bit is written. If the user is using
the interrupt option then this bit can be used as an
interrupt pending bit. Data in the data conversion
register are valid only when this bit is set to “1”.
Bit 5 =
STA
: Start of Conversion. Write Only
. Writ-
ing a “1” to this bit will start a conversion on the se-
lected channel and automatically reset to “0” the
EOC bit. If the bit is set again when a conversion is
in progress, the present conversion is stopped and
a new one will take place. This bit is write only, any
attempt to read it will show a logical zero.
Bit 4 =
PDS
: Power Down Selection.
This bit acti-
vates the A/D converter if set to “1”. Writing a “0” to
this bit will put the ADC in power down mode (idle
mode).
Bit 3=
CLSEL
:
Clock Selection
. When set, the
ADC is driven by the MCU internal clock divided by
6, and typical conversion time at 8MHz is 35μs.
When cleared (Reset state), MCU clock divided by
12 is used with a typical 70μs conversion time at
8MHz.
Bit 2 =
OSCOFF
. When low, this bit enables main
oscillator to run. The main oscillator is switched off
when OSCOFF is high.
Bit 1-0: Reserved. Must be kept cleared.
A/D Converter Data Register (ADR)
Address: 0D0h
—
Read only
Bit 7-0 =
D7-D0
: 8 Bit A/D Conversion Result.
SS
-----------------V
7
0
EAI
EOC
STA
PDS
CLSEL
OSC
OFF
D1
D0
7
0
D7
D6
D5
D4
D3
D2
D1
D0
52
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