- 您现在的位置：买卖IC网 > PDF目录98144 > ST6375B1/XXX (STMICROELECTRONICS) 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 PDF资料下载
参数资料
| 型号： | ST6375B1/XXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| 封装： | SHRINK, PLASTIC, DIP-42 |
| 文件页数： | 35/84页 |
| 文件大小： | 861K |
| 代理商： | ST6375B1/XXX |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页当前第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页
40/84
ST6365, ST6375, ST6385 ST6367, ST6377, ST6387
SERIAL PERIPHERAL INTERFACE (Cont’d)
4.3.4 STD SPI Protocol (Shift Register)
This protocol is similar to the I
2C BUS with the ex-
ception that there is no acknowledge pulse and
there are no stop or start bits. The clock cannot be
slowed down by the external peripherals.
In this case all three outputs should be high in or-
der not to lock the software I/Os from functioning.
SPI Standard Bus Protocol: The standard bus pro-
tocol is selected by loading the SPI Control Regis-
ter 1 (SCR1 Add. EBh). Bit 0 named I2C must be
set at one and bit 1 named STD must be reset.
When the standard bus protocol is selected bit 2 of
the SCR1 is meaningless.
This bit named STOP bit is used only in I
2C BUS
or SBUS. However take care that THE STOP BIT
MUST BE RESET WHEN THE STANDARD PRO-
TOCOL IS USED. This bit is set to ZERO after RE-
SET.
Figure 28. Software Bus (Hardware Bus Disabled) Timing Diagram
4.3.5 SPI Data/Control Register
For I/O details on SCL (Serial Clock), SDA (Serial
Data) and SEN (Serial Enable) please refer to I/O
Ports description with reference to the following
registers:
Port C data register, Address C2h (Read/Write).
- BIT D0 “SCL”
- BIT D1 “SDA”
- BIT D3 “SEN”
Port C data direction register, Address C6h (Read/
Write).
SPI Serial Data Register (SSDR)
Address: CCh - Read/Write
Reset Value: XXh
SSDR7-0. These are the SPI data bits. They can
be neither read nor written when SPI is operating
(BUSY bit set). They are undefined after reset.
VA00453
0
234
16
7
5
IDENT (was SEN, this is optionally controlled by software; output
as far as hardware is concerned is high).
CLOCK
(was SCL)
DATA
(was SDA, TRANSMIT)
DATA
(was SDA, RECEIVE)
70
SSDR
7
SSDR
6
SSDR
5
SSDR
4
SSDR
3
SSDR
2
SSDR
1
SSDR
0
相关PDF资料 |
PDF描述 |
|---|---|
| ST6367B1/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6382B1/XXX | 8-BIT, MROM, MICROCONTROLLER, PDIP42 |
| ST6386B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6388B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6387B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST6377 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6377B1/XXX | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| ST63-7-W1-22-9-120 | 制造商:TE Connectivity 功能描述:ST63-7-W1-22-9-120 |
| ST63-7-W1-22-9-120CS28 | 制造商:TE Connectivity 功能描述:E53797N001 |
| ST63-7-W1-22-9-120CS2894 | 制造商:TE Connectivity 功能描述: |
发布紧急采购，3分钟左右您将得到回复。