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参数资料
| 型号： | ST6382B1/XXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PDIP42 |
| 封装： | PLASTIC, SDIP-42 |
| 文件页数： | 48/82页 |
| 文件大小： | 1651K |
| 代理商： | ST6382B1/XXX |
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Obsolete
Product(s)
- Obsolete
Product(s)
52/82
ST6388, ST63E88, ST63T88
ON-SCREEN DISPLAY (Cont’d)
Table 18. OSD Control Registers and Data RAM
Addressing
OSD Global Enable Register
This register contains the global enable bit (GE),
OSD Ram Enable bit (ORE) and the line select bits
(LS1/LS0). This register can be written at any time.
It is a write only register.
OSD Global Enable Bit Register (OGER)
Address: 3Fh - Page 5
—
Write Only
D7-D4. These bits are not used
GE. Global Enable. This bit allows the entire dis-
play to be turned off.
“0” The entire display is disabled. The other regis-
ters of the OSD can be accessed by the Core.
“1” Display of words is controlled by the word en-
able bits (WE) located in the format or space
character. The other registers cannot be ac-
cessed by the Core.
ORE. OSD Ram Enable. This bit controls the ac-
cess to the OSD RAM.
“0” The OSD RAM can be accessed by the Core.
“1” The OSD RAM content is displayed on screen
and cannot be accessed by Core.
Note: The display of characters on screen is only
possible after the setting of these two bits
LS1-LS0. This bits selects one pair of OSD RAM
lines that is to be mapped into the 0h-35h address
area. There are four possible values of this pair of
bits:
“00” - selects line 0 and line 1;
“01” - selects line 2 and line 3;
“10” - selects line 4 and line 5;
“11” - selects line 6 and line 7.
Note: The global registers in page 5 are accessi-
ble at RAM locations 38h-3Fh, page 5 selected,
regardless of the value of the LS0/LS1 bits.
OSD Polarity Select Register (OPSR)
Address: EDh - Static Page
— Write Only
D7-D4. These bits are reserved and must always
be written with 0.
VSP. Vertical sync polarity input select bit. This bit
selects the polarity of the VSync input signal (“0”
for positive, “1” for negative polarity, respectively).
HSP. Horizontal sync input polarity select bit. This
bit selects the polarity of the HSync input signal
(“0” for positive, “1” for negative polarity, respec-
tively).
BLKP. Blanking output polarity select bit. This bit
selects the polarity of the BLK output (“0” for posi-
tive, “1” for negative polarity, respectively).
RGBP. RGB output polarity select bit. This bit se-
lects the polarity of the RGB outputs (“0” for posi-
tive, “1” for negative polarity, respectively).
Note: Reset value is 00h, all polarities being posi-
tive.
Page
Address
Register or RAM
Page 5
00h - 14h
RAM Locations 00h - 14h
Page 5
20h - 34h
RAM Locations 20h - 34h
Page 5
38h
Vertical Start Register
Page 5
39h
Horizontal Start Register
Page 5
3Ah
Vertical Space Register 0
Page 5
3Bh
Horizontal Space Register
Page 5
3Ch
Background Control Register
Page 5
3Dh
Vertical Space Register 1
Page 5
3Fh
Global Enable Register
Static
page
EDh
OSD Polarity Select Register
70
D7
D6
D5
D4
LS1
LS0
ORE
GE
70
D7
D6
D5
D4
VSP
HSP
BLKP
RGBP
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PDF描述 |
|---|---|
| ST6386B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6388B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6387B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST6382B4 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6383 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6383B1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6383B4 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6385 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
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