参数资料
型号: ST6392B1
厂商: 意法半导体
英文描述: 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
中文描述: 8位微控制器HCMOS电视频率合成带OSD
文件页数: 9/68页
文件大小: 560K
代理商: ST6392B1
PIN DESCRIPTION
V
DD
andV
SS
.
Power is supplied to the MCU using
these twopins. V
DD
ispower andV
SS
istheground
connection.
OSCin, OSCout.
These pins are internally con-
nected to the on-chip oscillator circuit. A quartz
crystal or a ceramic resonator can be connected
between these two pins in order to allow the cor-
rect operation of the MCU with various stabil-
ity/cost trade-offs. The OSCin pin is the input pin,
the OSCoutpin is the output pin.
RESET.
The active low RESET pin is used to start
the microcontroller to thebeginning of its program.
Additionally the quartz crystal oscillator will be dis-
abled when theRESETpin is low to reducepower
consumptionduringresetphase(ST6392/99only).
TEST.
The TEST pin must be held at V
SS
for nor-
mal operation.
PA0-PA7.
These 8 linesare organized as one I/O
port (A). Each line may be configured as either an
input withor withoutpull-upresistoror asan output
under software control of the data direction regis-
ter. PinsPA4 to PA7 are configured asopen-drain
outputs (12V drive). On PA4-PA7 pins the input
pull-up option is not available while PA6 and PA7
have additional current driving capability (25mA,
V
OL
:1V). PA0 to PA3 pins are configured as push-
pull.
PB0-PB2, PB4-PB6.
These 6 lines are organized
as oneI/Oport(B).Each linemay be configuredas
either aninput withorwithoutinternalpull-up resis-
tor or as an output under software control of the
data directionregister.
PC0-PC7.
These 8 linesare organized as one I/O
port (C). Each line may be configured as either an
input with or without internal pull-up resistor or as
an outputunder software control of thedata direc-
tion register. Pins PC0 to PC3 are configured as
open-drain(5V drive) in output mode while PC4 to
PC7 are open-drain with 12V drive and the input
pull-up options doesnot existon thesefour pins.
PC0, PC1 and PC3 lines when in output mode are
“ANDed” with the SPI control signals and are all
Open-drain.PC0is connectedtothe SPIclock sig-
nal (SCL), PC1 with the SPI data signal (SDA)
while PC3 is connected with SPI enable signal
(SEN, used in S-BUS protocol).Pin PC4 and PC6
can alsobe inputsto softwareprogrammableedge
sensitive latches which can generate interrupts;
PC4 can be connected to Power Interrupt while
PC6 can be connected to the IRIN/NMI interrupt
line.
DA0-DA5.
These pins are the six PWM D/A out-
puts of the 6-bit on-chip D/A converters. These
lines have open-drain outputs with 12V drive. The
output repetition rate is 31.25KHz (with 8MHz
clock).
AFC.
This is the input oftheon-chip 10levelscom-
parator that can be used to implement the AFC
function. This pin is an high impedance input able
to withstand signals with a peak amplitude up to
12V.
OSDOSCin, OSDOSCout.
These are the On
Screen Display oscillator terminals. An oscillation
capacitorand coilnetworkhave to beconnectedto
provide the right signal to theOSD.
HSYNC, VSYNC.
These are the horizontal and
vertical synchronization pins. The activepolarity of
these pins to the OSD macrocell can be selected
by the user as ROM mask option. If the device is
specified to have negative logic inputs, then these
signals are low the OSDoscillator stops. If the de-
vice is specifiedto have positivelogic inputs,then
when these signals are high the OSD oscillator
stops.
R, G,B, BLANK
. Outputsfrom theOSD. R, G and
B are the color outputs while BLANK is the blank-
ing output.All outputsarepush-pull.The activepo-
larity of thesepins can be selected by the user as
ROM mask option.
62.5kHz OUT.
This pin is available only on the
ST6392/99.The pin isan open drain (12V) output
at the frequencyof 62.5kHz (with an 8MHz clock).
The pin can be used to drive the SGS-THOMSON
TEA5640
Chroma
Processor. Refer
TEA5640 Data sheetfor moreinformation.
to
the
ST6391,92,93,95,97,99
5/64
相关PDF资料
PDF描述
ST6393B1 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
ST6395B1 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
ST6391B1 MOSFET; Transistor Polarity:Dual N Channel; Continuous Drain Current, Id:2.6A; On-Resistance, Rds(on):0.18ohm; Package/Case:8-SOIC; Leaded Process Compatible:No; Mounting Type:surface mount; Peak Reflow Compatible (260 C):No
ST6392 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
ST6393 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
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