参数资料
型号: ST7FL09Y0MATRE
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDSO16
封装: 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-16
文件页数: 52/104页
文件大小: 2151K
代理商: ST7FL09Y0MATRE
Obsolete
Product(s)
- Obsolete
Product(s)
ST7L05, ST7L09
51/104
12-BIT AUTORELOAD TIMER (Cont’d)
AUTORELOAD REGISTER (ATRH)
Read / Write
Reset Value: 0000 0000 (00h)
AUTORELOAD REGISTER (ATRL)
Read / Write
Reset Value: 0000 0000 (00h)
Bits 15:12 = Reserved, must be kept cleared.
Bits 11:0 = ATR[11:0] Autoreload Register
This is a 12-bit register which is written by soft-
ware. The ATR register value is automatically
loaded into the upcounter when an overflow oc-
curs. The register value is used to set the PWM
frequency.
PWM0 DUTY CYCLE REGISTER HIGH (DCR0H)
Read / Write
Reset Value: 0000 0000 (00h)
PWM0 DUTY CYCLE REGISTER LOW (DCR0L)
Read / Write
Reset Value: 0000 0000 (00h)
Bits 15:12 = Reserved, must be kept cleared.
Bits 11:0 = DCR[11:0] PWMx Duty Cycle Value
This 12-bit value is written by software. The high
register must be written first.
In PWM mode (OE0 = 1 in the PWMCR register)
the DCR[11:0] bits define the duty cycle of the
PWM0 output signal (see Figure 29). In Output
Compare mode, (OE0 = 0 in the PWMCR register)
they define the value to be compared with the 12-
bit upcounter value.
PWM0
CONTROL/STATUS
REGISTER
(PWM0CSR)
Read / Write
Reset Value: 0000 0000 (00h)
Bit 7:2 = Reserved, must be kept cleared.
Bit 1 = OP0 PWM0 Output Polarity
This bit is read/write by software and cleared by
hardware after a reset. This bit selects the polarity
of the PWM0 signal.
0: The PWM0 signal is not inverted.
1: The PWM0 signal is inverted.
Bit 0 = CMPF0 PWM0 Compare Flag.
This bit is set by hardware and cleared by software
by reading the PWM0CSR register. It indicates
that the upcounter value matches the DCR0 regis-
ter value.
0: Upcounter value does not match DCR value.
1: Upcounter value matches DCR value.
15
8
0
ATR11 ATR10
ATR9
ATR8
70
ATR7
ATR6
ATR5
ATR4
ATR3
ATR2
ATR1
ATR0
15
8
0
DCR11 DCR10 DCR9
DCR8
70
DCR7
DCR6
DCR5
DCR4
DCR3
DCR2
DCR1
DCR0
70
00
OP0
CMPF0
1
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