参数资料
型号: ST8024CTR
厂商: 意法半导体
英文描述: Smartcard interface
中文描述: 智能卡接口
文件页数: 20/30页
文件大小: 550K
代理商: ST8024CTR
Functional description
ST8024
20/30
must stay below the specified maximum current value. For reasons of V
CC
voltage accuracy,
a 100 nF capacitor with an ESR < 100 m
should be tied to CGND near to pin V
CC
, and 100
nF capacitor with the same ESR should be tied to CGND near card reader contact C1.
5.10
Fault detection
The following fault conditions are monitored:
– Short-circuit or high current on V
CC
– Removal of a card during a transaction
– V
DD
dropping
– DC/DC converter operating out of the specified values (V
DDP
too low or current from
V
UP
too high)
– Overheating.
– There are two different cases (see
Figure 8.
):
– CMDVCC HIGH outside a card session. Output OFF is LOW if a card is not in the
card reader, and HIGH if a card is in the reader. A voltage drop on the V
DD
supply is
detected by the supply supervisor, this generates an internal Power-on reset pulse
but does not act upon OFF. No short-circuit or overheating is detected because the
card is not powered-up.
– CMDVCC LOW within a card session. Output OFF goes LOW when a fault condition
is detected. As soon as this occurs, an emergency deactivation is performed
automatically (see
Figure 9.
). When the system controller resets CMDVCC to HIGH it
may sense the OFF level again after completing the deactivation sequence. This
distinguishes between a hardware problem or a card extraction (OFF goes HIGH
again if a card is present).
Depending on the type of card-present switch within the connector (normally-closed or
normally-open) and on the mechanical characteristics of the switch, bouncing may occur on
the PRES signals at card insertion or withdrawal.
There is a debounce feature in the device with an 8 ms typical duration (see Fig.8). When a
card is inserted, output OFF goes HIGH only at the end of the debounce time.
When the card is extracted, an automatic deactivation sequence of the card is performed on
the first true/false transition on PRES or PRES and output OFF goes LOW.
Figure 8.
Behavior of OFF, CMDVCC, PRES and V
CC
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