参数资料
型号: ST93C46TM6TR
厂商: 意法半导体
英文描述: TRANSISTOR,MOSFET,P-CHANNEL,20V V(BR)DSS,3.4A I(D),TSOP
中文描述: 每1000 64 x 16或128 × 8 MICROWIRE的串行EEPROM的
文件页数: 7/13页
文件大小: 111K
代理商: ST93C46TM6TR
AI00878C
1 1 0 An
A0
Qn
Q0
DATA OUT
D
S
Q
READ
S
WRITE
ADDR
OP
CODE
1 0
An
A0
DATA IN
D
Q
OP
CODE
Dn
D0
1
BUSY
READY
S
ERASE
WRITE
ENABLE
1
0
Xn X0
D
OP
CODE
1
0
1
S
ERASE
WRITE
DISABLE
1
0
Xn X0
D
OP
CODE
0
0
0
CHECK
STATUS
ADDR
Figure6. READ, WRITE, EWEN, EWDS Sequences
Erase
The Erase instruction (ERASE) programs the ad-
dressed memory byteor word bitsto ’1’. Oncethe
addressiscorrectlydecoded,thefallingedgeofthe
Chip Select input (S) starts a self-timed program-
ming cycle.
If the ST93C46 is still performing the write cycle,
the Busysignal (Q= 0)will bereturnedif Sisdriven
high, and the ST93C46will ignoreany dataon the
bus. When thewrite cycle iscompleted,the Ready
signal (Q = 1) will indicate (if S is driven high) that
the ST93C46is ready to receive a new instruction.
Write
The Write instruction (WRITE) is followed by the
addressandthe8or16databitsto bewritten. Data
input is sampled on the Low to High transition of
the clock.After thelast databit has beensampled,
Chip Select (S) must be brought Low before the
next rising edge of the clock(C), in order to start
the self-timed programming cycle. If the ST93C46
is still performing the write cycle, the Busy signal
Notes:
1. An: n = 5 for x16 org. and 6 for x8 org.
2. Xn: n = 3 for x16 org. and 4 for x8 org.
7/13
ST93C46A/46C/46T, ST93C47C/47T
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ST93C47C MOSFET; Transistor Polarity:P Channel; Drain Source Voltage, Vds:-12V; Continuous Drain Current, Id:-4.5A; On-Resistance, Rds(on):0.04ohm; Rds(on) Test Voltage, Vgs:-4.5V; Package/Case:6-TSOP; Leaded Process Compatible:No
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