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参数资料
| 型号： | STCD1020RDG6E |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, PDSO8 |
| 封装： | 2 X 2 MM, ROHS COMPLIANT, TDFN-8 |
| 文件页数： | 8/40页 |
| 文件大小： | 1775K |
| 代理商： | STCD1020RDG6E |
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DC and AC parameters
STCD1020, STCD1030, STCD1040
PN
Additive phase noise(3)(8)
at 1 kHz offset
-135
dBc/
Hz
at 10 kHz offset
-145
at 100 kHz offset
-150
tRECB
Buffer recovery time from off to
on
STCD10x0 active
20
μs
tRECC
STCD10x0 active recovery time
from standby to active
50
μs
CL
Capacitive load for each channel
10
20
pF
RL
Resistive load for each channel
10
k
Ω
1.
Valid for ambient operating temperature: TA = -40°C to 85°C; VCC = 1.65 V to 2.75 V; typical TA = 25°C; Load
capacitance = 10 pF (except where noted).
2.
Clock input voltage level should not exceed supply rails.
3.
Simulated and determined via design and NOT 100% tested.
4.
The quiescent current is measured when the enable pins are active, but without input master clock signal (fmclk = 0 Hz).
5.
The active current is dependent on the master clock input Vpp and frequency and the capacitive load condition. The
typical test condition is 26 MHz sine wave with 1 Vpp master clock input, CL = 10 pF.
6.
The rise time is measured when clock edge transfers from 10% VCC to 90% VCC. The fall time is measured when clock
edge transfers from 90% VCC to 10% VCC.
7.
Other test results are under test condition VENH = 1.8 V and VENL = 0 V.
8.
Guaranteed with the supply noise of 30
μ Vrms from 300 Hz to 50 kHz.
Table 7.
DC and AC characteristics (1.8 V supply)
Symbol
Parameter
Condition(1)
Min
Typ
Max
Unit
Table 8.
Operating and AC measurement conditions (2.8 V supply)
Parameter
Condition
Unit
VCC supply
2.5 to 3.6
V
Output clock voltage (CLK1…CLK4)
0 to VCC
V
Device enable voltage (EN1…EN4)
0 to VCC
V
Ambient operating temperature (TA)
-40 to +85
°C
Table 9.
DC and AC characteristics (2.8 V supply)
Symbol
Parameter
Condition(1)
Min
Typ
Max
Unit
fMCLK
Master clock (eg. from VCTCXO)
Sine wave/square wave
10
26
52
MHz
VCC
Supply voltage
2.5
2.8
3.6
V
Vin
Input clock voltage level(2)
0.75
1
Vpp
Vout
Output gain level(3)
CL = 10 pF
-1.5
-0.5
dB
IQ
Quiescent current(4)
2 buffers version
1.7
2.6
mA
3 buffers version
2.2
3.3
4 buffers version
2.8
4
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相关代理商/技术参数 |
参数描述 |
|---|---|
| STCD1020RDG6F | 功能描述:时钟缓冲器 MULTI-CHANNEL CLOCK DISTRIBUTION CIRCUIT RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| STCD1020RDH6E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Multichannel clock distribution circuit |
| STCD1020RDH6F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Multichannel clock distribution circuit |
| STCD1020RDM6E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Multichannel clock distribution circuit |
| STCD1020RDM6F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Multichannel clock distribution circuit |
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