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参数资料
| 型号： | STEL-1377Q |
| 英文描述： | FREQUENCY SYNTHESIZER|DIP|64PIN|PLASTIC |
| 中文描述： | 频率合成器|双酯| 64管脚|塑料 |
| 文件页数： | 11/19页 |
| 文件大小： | 284K |
| 代理商： | STEL-1377Q |
11
STEL-2060C
A.C. CHARACTERISTICS
(Operating Conditions: V
DD
= 5.0
±
5% volts, T
a
= 0
°
to 70
°
C)
Symbol
Parameter
Min.
Max.
Units
Conditions
f
DAT
Data speed, Parallel input mode (
PARL
= 1),
45
Mbps
PARL
= 1
and
all rates when
not
using Internal Depuncturing
Data speed, Sequential input mode (
PARL
= 0),
Rate
1
/
2
RATE
2-0
= 0
PARL
= 0
or
RATE
2-0
≠
0
PARL
= 0
or
f
DAT
45
Mbps
and all rates and modes
when
using Internal Depuncturing
t
SU
t
HD
t
SUI
t
HDI
t
SHPE,
t
SLPE
G1
,
G2
,
PNCG1
or
PCNG2
,
LDG2
to
SYMCKIN
Setup
3
nsecs.
G1
,
G2
,
PNCG1
or
PCNG2
,
LDG2
to
SYMCKIN
Hold
5
nsecs.
RATE
2-0
= 0
PARL
= 1
and
RATE
2-0
≠
0
PARL
= 1
and
G1
,
G2
,
PNCG1
or
PCNG2
,
LDG2
to
SYMCKIN
Setup
6
nsecs.
G1
,
G2
,
PNCG1
or
PCNG2
,
LDG2
to
SYMCKIN
Hold
6
nsecs.
SYMCKIN
Pulse width (high or low), Parallel input mode,
10
nsecs.
all rates when
not
using Internal Depuncturing
RATE
2-0
= 0
PARL
= 1
and
RATE
2-0
≠
0
PARL
= 0
t
SHPI,
t
SLPI
SYMCKIN
Pulse width (high or low), Parallel input mode,
12
nsecs.
all rates
when
using Internal Depuncturing
t
SHS,
t
SLS
t
SO
t
DO
t
OD
SYMCKIN
Pulse width (high or low), Serial input mode
6
nsecs.
SYMCKIN
to
ODCLK
stable delay (
RATE
2-0
= 000)
DCLKIN
to
ODCLK
stable delay (
RATE
2-0
≠
000)
ODCLK
to output stable delay, all other outputs
3
8
nsecs.
3
8
nsecs.
Load = 15 pF
1
3
nsecs.
Load = 15 pF
}
}
}
}
}
}
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相关代理商/技术参数 |
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|---|---|
| STEL-1377S | 制造商:未知厂家 制造商全称:未知厂家 功能描述:FREQUENCY SYNTHESIZER|DIP|64PIN|PLASTIC |
| STEL-1378A | 制造商:未知厂家 制造商全称:未知厂家 功能描述:FREQUENCY SYNTHESIZER|HYBRID|DIP|64PIN|PLASTIC |
| STEL-2000A+20/CR | 制造商:未知厂家 制造商全称:未知厂家 功能描述:RF MODULATOR/DEMODULATOR|CMOS|QFP|100PIN|PLASTIC |
| STEL-2000A+45/CR | 制造商:未知厂家 制造商全称:未知厂家 功能描述:RF MODULATOR/DEMODULATOR|CMOS|QFP|100PIN|PLASTIC |
| STEL2020 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Convolutional-FEC-Viterbi Error Circuit - Burst and continuous modes |
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