参数资料
型号: STM32L152VBT6DTR
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100
文件页数: 45/106页
文件大小: 1417K
代理商: STM32L152VBT6DTR
STM32L151xx, STM32L152xx
Electrical characteristics
Doc ID 17659 Rev 1
6.2
Absolute maximum ratings
Stresses above the absolute maximum ratings listed in Table 6: Voltage characteristics,
damage to the device. These are stress ratings only and functional operation of the device
at these conditions is not implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
Table 6.
Voltage characteristics
Symbol
Ratings
Min
Max
Unit
VDD–VSS
External main supply voltage
(including VDDA and VDD)
(1)
1.
All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power
supply, in the permitted range.
–0.3
4.0
V
VIN
Input voltage on five-volt tolerant pin(2)
2.
Positive current injection is not possible on these I/Os. VIN maximum must be respected. Negative current
injection is possible and must not exceed
IINJ(PIN).
VSS 0.3
VDD+4.0
Input voltage on any other pin(3)
3.
IINJ(PIN) must never be exceeded (see Table 7: Current characteristics). This is implicitly insured if VIN
maximum is respected. If VIN maximum cannot be respected, the injection current must be limited
externally to the IINJ(PIN) value. A positive injection is induced by VIN > VINmax while a negative injection is
induced by VIN < VSS.
VSS 0.3
4.0
|
ΔVDDx|
Variations between different VDD power pins
50
mV
|VSSX VSS|
Variations between all different ground pins
50
VESD(HBM)
Electrostatic discharge voltage
(human body model)
Table 7.
Current characteristics
Symbol
Ratings
Max.
Unit
IVDD
Total current into VDD/VDDA power lines (source)
(1)
1.
All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power
supply, in the permitted range.
150
mA
IVSS
Total current out of VSS ground lines (sink)
150
IIO
Output current sunk by any I/O and control pin
25
Output current sourced by any I/O and control pin
- 25
IINJ(PIN)
(2)
2.
Negative injection disturbs the analog performance of the device. See note in Section 6.3.15.
Injected current on NRST pin(3)
3.
IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum
cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive
injection is induced by VIN > VDD while a negative injection is induced by VIN < VSS.
± 5
Injected current on five-volt tolerant I/O(4)
4.
Positive current injection is not possible on these I/Os. VIN maximum must be respected. Negative current
injection is possible and must not exceed
IINJ(PIN).
+0 / -5
Injected current on any other pin (3)
± 5
ΣIINJ(PIN)
Total injected current (sum of all I/O and control pins)(5)
± 25
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