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参数资料
| 型号： | STP2011PGA50 |
| 元件分类： | 参考电压二极管 |
| 英文描述： | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| 中文描述： | 250 的低电流运算，低反向泄露，低噪声稳压二极管 |
| 文件页数： | 12/20页 |
| 文件大小： | 221K |
| 代理商： | STP2011PGA50 |
12
STP2000QFP
32-bit SBus Master I/O Controller
Master I/O
July 1997
1. These minimum numbers are required to comply with ANSI SCSI spec. For Synchronous SCSI data transfers and FASTCLK enabled,
the clock inputs must also meet the following requirements: 2t
CP
+ t
CL
> 97.92 ns and 2t
CP
+ t
CH
> 97.92 ns.
Synchronous SCSI Input Cycle
42
Data setup to SCSI_REQ/SCSI_ACK low
5
–
ns
43
Data hold from SCSI_REQ/SCSI_ACK low
15
–
ns
44
SCSI_REQ assertion period
27
–
ns
45
SCSI_REQ negation period
20
–
ns
46
SCSI_ACK assertion period
20
–
ns
47
SCSI_ACK negation period
20
–
ns
AC Characteristics: Ethernet Timing
Signal #
Parameter
Min
Max
Units
48
ENET_TCLK period
99
101
ns
49
ENET_TCLK high pulse duration
45
–
ns
50
ENET_TCLK low pulse duration
45
–
ns
51
ENET_TCLK rise time
–
8
ns
52
ENET_TCLK fall time
–
8
ns
53
ENET_TENA propagation delay after rising edge of ENET_TCLK
–
25
ns
54
ENET_TENA hold time after ENET_TCLK rising
7
–
ns
55
ENET_TX propagation delay after ENET_TCLK rising
–
32
ns
56
ENET_TX hold time after ENET_TCLK rising
7
–
ns
57
ENET_RCLK period
85
118
ns
58
ENET_RCLK high pulse duration
38
–
ns
59
ENET_RCLK low pulse duration
38
–
ns
60
ENET_RCLK rise time
–
8
ns
61
ENET_RCLK fall time
–
8
ns
62
ENET_RX data rise time
–
8
ns
63
ENET_RX data fall time
–
8
ns
64
ENET_RX data hold time from ENET_RCLK rising
5
–
ns
65
ENET_RX data setup time to ENET_RCLK rising
40
–
ns
66
ENET_RENA low duration
120
–
ns
67
ENET_CLSN high duration
110
–
ns
68
ENET_RENA hold time after the rising edge of ENET_RCLK
1
–
ns
69
ENET_RENA defer before ENET_TENA
356
–
ns
70
ENET_RENA extended after ENET_RCLK last falling
–
275
ns
AC Characteristics: SCSI TIming (Continued)
Signal #
Parameter
Conditions
Min
Max
Units
This Material Copyrighted by Its Respective Manufacturer
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PDF描述 |
|---|---|
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相关代理商/技术参数 |
参数描述 |
|---|---|
| STP2012PQFP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:DMA Controller |
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| STP2014PQFP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:BUS CONTROLLER |
| STP2016QFP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU System Clock Generator |
| STP2018TAB | 制造商:未知厂家 制造商全称:未知厂家 功能描述:BUS CONTROLLER |
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