参数资料
型号: STR736FV2T7
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, TQFP-100
文件页数: 15/52页
文件大小: 1384K
代理商: STR736FV2T7
Electrical parameters
STR73xFxx
22/52
4.2
Absolute maximum ratings
Stresses above those listed as “absolute maximum ratings” may cause permanent damage
to the device. This is a stress rating only and functional operation of the device under these
conditions is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
1.
All 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V
supply
2.
IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum
cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive
injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS.
3.
Negative injection disturbs the analog performance of the device. See note in Section 4.3.6: 10-bit ADC
4.
When several inputs are submitted to a current injection, the maximum
ΣI
INJ(PIN) is the absolute sum of the
positive and negative injected currents (instantaneous values). These results are based on
characterization with
ΣI
INJ(PIN) maximum current injection on four I/O port pins of the device.
5.) In 144-pin devices, only +10 mA on P0.3, P1.13, P3.6 and P4.13 pins (negative injection not allowed).
Table 5.
Voltage characteristics
Symbol
Ratings
Min
Max
Unit
VDD - VSS
External 5 V Supply voltage
-0.3
6.0
V
VSSA
Reference ground for A/D converter
VSS
V
VDDA- VSSA
Reference voltage for A/D converter
-0.3
VDD+0.3
V
VIN
Input voltage on any pin
-0.3
VDD+0.3
|
ΔV
DDx|
Variations between different 5 V
power pins
-0.3
mV
|VSSX - VSS|
Variations between all the different
ground pins
-0.3
VESD(HBM)
Electrostatic discharge voltage
(Human Body Model)
VESD(MM)
Electrostatic discharge voltage
(Machine Model)
Table 6.
Current characteristics
Symbol
Ratings
Max.
Unit
IVDD
Total current into VDD power lines (source)
1)
100
mA
IVSS
Total current out of VSS ground lines (sink)
1)
100
IIO
Output current sunk by any I/O and control pin
10
Output current source by any I/O and control pin
10
IINJ(PIN)
2) & 3)
Injected current on any other pin 4) &5)
±10
ΣI
INJ(PIN)
2)
Total injected current (sum of all I/O and control pins) 4)
±75
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