参数资料
| 型号： | SY87702LHI |
| 厂商： | Micrel Inc |
| 文件页数： | 1/14页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK/DATA RECOVERY 64-TQFP |
| 标准包装： | 160 |
| 系列： | AnyRate® |
| 类型： | 时钟和数据恢复（CDR），多路复用器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，ATM 应用 |
| 输入： | PECL |
| 输出： | CML，PECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:6 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 2.5Gbps |
| 电源电压： | 3.15 V ~ 3.45 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-TQFP 裸露焊盘 |
| 供应商设备封装： | 64-EP-TQFP |
| 包装： | 托盘 |
SY87702L
1
Micrel, Inc.
M9999-072706
hbwhelp@micrel.com or (408) 955-1690
Rev.: D
Amendment: /0
Issue Date: July 2006
DESCRIPTION
FEATURES
SY87702L
■ 3.3V power supply
■ Complies with Bellcore, ITU/CCITT and ANSI
specifications for applications such as OC-1, OC-3,
OC-12, OC-48*, and ATM
■ Compatible with FDDI, Gigabit Ethernet, Fibre
Channel, 2X Fibre Channel, SMPTE 259 and 292, and
proprietary applications
■ Low power
■ Clock and data recovery from 28Mbps up to 2.5Gbps
NRZ data stream
■ Selectable reference frequencies via programmable
multiplier
■ Differential PECL and CML high-speed serial outputs
■ Line receiver input: no external buffering needed
■ Link fault indication
■ 100K ECL compatible I/O
■ Available in 64-Pin EP-TQFP package
■ Product obsolete. Use SY87721L for new designs
The SY87702L is a complete Clock Recovery and Data
retiming integrated circuit for data rates from 28Mbps up to
2.5Gbps NRZ. The device is ideally suited for SONET/SDH/
ATM, Fibre Channel, and Gigabit Ethernet applications, as
well as other high-speed data transmission applications.
Clock recovery and data retiming is performed by
synchronizing the on-chip VCO directly to the incoming data
stream. The VCO center frequency is controlled by the
reference clock frequency and the selected divide ratio. On-
chip clock generation is performed through the use of a
frequency multiplier PLL and can be used as a Clock
Multiplier Unit (CMU). The integrated CMU can provide this
clock signal at the TCLK outputs. Additionally, the TCLK
output can be selected to provide a copy of the RCLK
frequency.
For SONET/SDH applications, the SY87702L includes a
Link Fault Detection circuit. This circuit, enabled by the output
of an optical module driving the CD input low, causes the
recovery PLL of the SY87702L to lock to the reference
clock's multiplied frequency under Loss-of-Signal conditions.
This low jitter clock is provided at the RCLK outputs and is
at the same frequency as that provided at the TCLK output.
3.3V 28Mbps-2.5Gbps AnyRate
CLOCK AND DATA RECOVERY
APPLICATIONS
■ Transponders and section repeaters
■ Multiplexer's: access, add drop (ADM), and terminal
(TM)
■ SONET/SDH/ATM: -based transmission systems,
modules, and test equipment
■ Terabit routers and broadband cross-connects
■ Fibre optic test equipment
■ HDTV switching and transmission
*Meets OC-48 Jitter Tolerance and Transfer
AnyRate is a registered trademark of Micrel, Inc.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY87702LHITR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY |
| SY87721-EVAL | 制造商:Micrel Inc 功能描述: |
| SY87721L | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V 28Mbps-2.7Gbps ANYRATE CLOCK AND DATA RECOVERY WITH INTEGRATED CLOCK MULTIPLIER UNIT |
| SY87721L_08 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:CLOCK AND DATA RECOVERY WITH INTEGRATED CLOCK MULTIPLIER UNIT |
| SY87721LHG | 功能描述:IC CLOCK/DATA RECOVERY 64-TQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:AnyRate® 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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