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参数资料
| 型号： | SY89534LHZ |
| 厂商： | MICREL INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 89534 SERIES, PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64 |
| 封装： | LEAD FREE, TQFP-64 |
| 文件页数： | 12/15页 |
| 文件大小： | 106K |
| 代理商： | SY89534LHZ |
6
Precision Edge
SY89534/35L
Micrel, Inc.
M9999-110308
hbwhelp@micrel.com or (408) 955-1690
AC ELECTRICAL CHARACTERISTICS
TA = 0
°CTA = +25°CTA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
fIN
Reference Input Frequency
———
14
—
160
———
MHz
fOUT
Output Frequency Range
———
33.33
—
500
———
MHz
tVCO
Internal VCO Frequency Range
600
—
1000
600
—
1000
600
—
1000
MHz
tskew
Within Device(11)
Within Bank
—
25
50
—
050
—
050
ps
Bank-to-Bank
—
60
150
—
60
150
—
60
150
ps
Part-to-Part Skew(12)
—————
200
——
200
ps
tLOCK
Maximum PLL Lock Time
—————
10
——
10
ms
tJITTER
Cycle-to-Cycle Jitter(13) (Pk-to-Pk)
—————
50
———
ps
Period Jitter(14)
(rms)
——
50
——
50
——
50
ps
tpw (min)
Minimum Pulse Width
———
50
——
50
——
ns
Target PLL Loop Bandwidth
Feedback Divider Ratio: 66(15)
—
1.0
——
1.0
——
1.0
—
MHz
Feedback Divider Ratio: 30(15)
—
2.0
——
2.0
——
2.0
—
MHz
tDC
fOUT Duty Cycle
———
45
50
55
45
50
55
%
tr, tf
Output Rise/Fall Time
ps
(20% to 80%)
LVPECL_Out
——
400
—
250
400
——
400
(SY89535L) LVDS_Out
——
450
—
300
450
——
450
tOUTPUT_RESET
(16)
—————
10
———
ns
tHOLD_FSEL
(16)
———
5
—————
ns
tSETUP_FSEL
(16)
———
5
—————
ns
tOUTPUT_SYNC
(16)
———
1
—————
VCO
clock cycle
FSEL-to-Valid Output Transition Time
————
50
————
ns
All VCC pins = +3.3V ±10%
NOTES:
11. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same
voltage and temperature.
12. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same
voltage and temperature.
13. Cycle-to-cycle jitter definition: The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. TJITTER_CC =Tn–Tn+1
where T is the time between rising edges of the output signal.
14. Period Jitter definition: For a specified amount of time (i.e., 1ms), there are N periods of a signal, and Tn is defined as the average period of that
signal. Period jitter is defined as the variation in the period of the output signal for corresponding edges relative to Tn. Parameter guaranteed by
design and characterization.
15. Using recommended loop filter components.
16. See
“Timing Diagrams."
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相关代理商/技术参数 |
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| SY89534LHZ TR | 功能描述:时钟合成器/抖动清除器 Precision Programmable Bus Clock Synthesizer (Green) RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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| SY89535L | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER |
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