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参数资料
| 型号： | TAS3202PAGR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封装： | GREEN, PLASTIC, TQFP-64 |
| 文件页数： | 15/66页 |
| 文件大小： | 817K |
| 代理商： | TAS3202PAGR |
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TAS3202
Address
Acknowledge
(By TAS3202)
Acknowledge
(By TAS3202)
Acknowledge
(By TAS3202)
Acknowledge
(By TAS3202)
Acknowledge
(By TAS3202)
TAS3202
Subaddress
(By Master)
I C WRITE TRANSACTION
2
I C READ TRANSACTION
2
TAS3202
Address
TAS3202
Address
Acknowledge
(By TAS3202)
Acknowledge
(By TAS3202)
Data
(By TAS3202)
TAS3202
Subaddress
(By Master)
Data
(By TAS3202)
Acknowledge
(By TAS3202)
SLES208B – JUNE 2009 – REVISED MARCH 2011
www.ti.com
bus is acknowledged by the receiving device with an acknowledge bit. Each transfer operation begins with
the master device driving a start condition on the bus and ends with the master device driving a stop
condition on the bus. The bus uses transitions on the data terminal (SDA) while the clock is HIGH to
indicate a start and stop conditions. A HIGH-to-LOW transition on SDA indicates a start, and a
LOW-to-HIGH transition indicates a stop. Normal data bit transitions must occur within the low time of the
clock period. The master generates the 7-bit slave address and the read/write (R/W) bit to open
communication with another device and then waits for an acknowledge condition. The slave holds SDA
LOW during acknowledge clock period to indicate an acknowledgement. When this occurs, the master
transmits the next byte of the sequence. Each device is addressed by a unique 7-bit slave address plus
R/W bit (one byte). All compatible devices share the same signals via a bidirectional bus using a
wired-AND connection. An external pullup resistor must be used for the SDA and SCL signals to set the
HIGH level for the bus.
There is no limit on the number of bytes that can be transmitted between start and stop conditions. When
the last word transfers, the master generates a stop condition to release the bus. Figure 6-3 shows the
TAS3202 read and write operation sequences.
transaction to give the TAS3202 the subaddress to be used in the read transaction that follows. This
subaddress assignment write transaction is then followed by the read transaction. For write transactions,
the subaddress is supplied in the first byte of data written, and this byte is followed by the data to be
written. For I2C write transactions, the subaddress must always be included in the data written. There
cannot be a separate write transaction to supply the subaddress, as was required for read transactions. If
a subaddress-assignment-only write transaction is followed by a second write transaction supplying the
data, erroneous behavior results. The first byte in the second write transaction is interpreted by the
TAS3202 as another subaddress replacing the one previously written.
Figure 6-3. I2C Subaddress Access Protocol
22
Microprocessor Controller
Copyright 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): TAS3202
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