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参数资料
| 型号： | TAS5103DAPRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 音频／视频放大 |
| 英文描述： | 15 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO32 |
| 封装： | GREEN, PLASTIC, HTSSOP-32 |
| 文件页数： | 10/25页 |
| 文件大小： | 1335K |
| 代理商： | TAS5103DAPRG4 |
Transitionto50%dutycycle
andholdfor10ms
Transitionto50%dutycycle
andholdfor10ms
Powering Down
ERROR REPORTING
DEVICE PROTECTION SYSTEM
SLLS801A – JUNE 2008 – REVISED JUNE 2008 .............................................................................................................................................................. www.ti.com
When the TAS5102/3 is being used with TI PWM
modulators
such
as
the
TAS5086,
no
special
attention to the state of RESET is required, provided
that the chipset is configured as recommended.
Figure 20. Power-Down/Power-Up Timing Diagram
Table 1. (continued)
FAULT
OTW
DESCRIPTION
The device remains fully operational as long as the
1
0
Junction temperature lower than
gate-drive supply voltage and VREG voltages are
125°C and no faults (normal
operation)
above the undervoltage protection (UVP) voltage
threshold (see the Electrical Characteristics section of
1
Junction temperature higher than
this data sheet). Although not specifically required, it
125°C (overtemperature warning)
is a good practice to hold RESET low during power
Note that asserting either RESET low forces the
down, thus preventing audible artifacts, including
FAULT signal high, independent of faults being
pops or clicks. To avoid pops and clicks, follow the
present. TI recommends monitoring the OTW signal
recommended timing diagram in Figure 20.
using the system microcontroller and responding to
When the TAS5102/3 is being used with TI PWM
an overtemperature warning signal by, e.g., turning
modulators
such
as
the
TAS5086,
no
special
down the volume to prevent further heating of the
attention to the state of RESET is required, provided
device, resulting in device shutdown (OTE).
that the chipset is configured as recommended.
To reduce external component count, an internal
pullup resistor to 3.3 V is provided on the FAULT
output. Level compliance for 5-V logic can be
The FAULT pin is an active-low, open-drain output.
obtained by adding external pullup resistors to 5 V
The OTW pin is a push-pull, active-high output. Their
(see the Electrical Characteristics section of this data
function is for protection-mode signaling to a PWM
sheet for further specifications).
controller or other system-control device.
Any fault resulting in device shutdown is signaled by
the FAULT pin going low. Likewise, OTW goes high
The
TAS5102/3
contains
advanced
protection
when the device junction temperature exceeds 125°C
circuitry
carefully
designed
to
facilitate
system
(see Table 1).
integration and ease of use, as well as to safeguard
the device from permanent failure due to a wide
Table 1.
range of fault conditions such as short circuits,
overtemperature, and undervoltage. The TAS5102/3
FAULT
OTW
DESCRIPTION
responds to a fault by immediately setting the power
0
Overcurrent (OC) or undervoltage
stage in a high-impedance (Hi-Z) state and asserting
(UVP) warning or overtemperature
error (OTE)
the
FAULT
pin
low.
In
situations
other
than
overcurrent (OC) and overtemperature error (OTE),
0
1
Overtemperature warning (OTW) or
overcurrent (OC) or undervoltage
the device automatically recovers when the fault
(UVP)
18
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s): TAS5102 TAS5103
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