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| 型号： | TAS5518PAGRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封装： | GREEN, PLASTIC, TQFP-64 |
| 文件页数： | 46/105页 |
| 文件大小： | 1514K |
| 代理商： | TAS5518PAGRG4 |
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TAS5518 Controls and Status
37
SLES115 — August 2004
TAS5518
Recovery from Clock Error
Power Supply Volume Control Enable
Volume and Mute Update Rate
Modulation Index Limit
Inter-channel Delay
Master Clock and Data Rate Controls
Bank Controls
2.3.1 Channel Configuration Registers
In order for the TAS5518 to have full control of the power stages, registers 0x05 to 0x0C must be programmed
to reflect the proper power stage and how each one should be controlled. Channel configuration registers
consist of eight registers, one for each channel.
The primary reason for using these registers is that different power stages require different handling during
start up, mute/unmute, shutdown, and error recovery. The TAS5518 must select the sequence that gives the
best click and pop performance and insure that the bootstrap capacitor is charged correctly during start up.
This sequence depends on which power stage is present at the TAS5518 output.
Table 25. Description of the Channel Configuration Registers (0x05 to 0x0C)
BIT
DESCRIPTION
D7
Enable/disable error recovery sequence. In case the BKND_RECOVERY pin is pulled low, this register determines if this channel is
to follow the error recovery sequence or to continue with no interruption.
D6
Determines if the power stage needs the TAS5518 VALID pin to go low to reset the power stage. Some power stages can be reset
by a combination of PWM signals. For these devices, it is recommended to set this bit low, since the VALID pin is shared for power
stages. This provides better control of each power stage.
D5
Determines if the power stage needs the TAS5518 VALID pin to go low to mute the power stage. Some power stages can be muted
by a combination of PWM signals. For these devices, it is recommended to set this bit low, since the VALID pin is shared for power
stages. This provides better control of each power stage.
D4
Inverts the PWM output. Inverting the PWM output can be an advantage if the power stage input pin are opposite the TAS5518 PWM
pinout. This makes routing on the PCB easier. To keep the phase of the output the speaker terminals must also be inverted.
D3
The power stage TAS5182 has a special PWM input. To ensure that the TAS5518 has full control in all occasions, the PWM output
must be remapped.
D2
Can be used to handle click and pop for some applications.
D1
This bit is normally used together with D2. For some power stages, both PWM signals must be high to get the desired operation of
both speaker outputs to be low. This bit sets the PWM outputs high-high during mute.
D0
Not used
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