参数资料
型号: TAS5612PHDR
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 125 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
封装: GREEN, HTQFP-64
文件页数: 10/26页
文件大小: 1718K
代理商: TAS5612PHDR
SLAS710 – JUNE 2010
www.ti.com
THEORY OF OPERATION
POWER SUPPLIES
To facilitate system design, the TAS5612A needs only a 12V supply in addition to the (typical) 32.5V
power-stage supply. An internal voltage regulator provides suitable voltage levels for the digital and low-voltage
analog circuitry. Additionally, all circuitry requiring a floating voltage supply, e.g., the high-side gate drive, is
accommodated by built-in bootstrap circuitry requiring only an external capacitor for each half-bridge.
To provide outstanding electrical and acoustical characteristics, the PWM signal path including gate drive and
output stage is designed as identical, independent half-bridges. For this reason, each half-bridge has separate
gate drive supply (GVDD_X), bootstrap pins (BST_X), and power-stage supply pins (PVDD_X). Furthermore, an
additional pin (VDD) is provided as supply for all common circuits. Although supplied from the same 12 V source,
it is highly recommended to separate GVDD_A, GVDD_B, GVDD_C, GVDD_D, and VDD on the printed-circuit
board (PCB) by RC filters (see application diagram for details). These RC filters provide the recommended
high-frequency isolation. Special attention should be paid to placing all decoupling capacitors as close to their
associated pins as possible. In general, inductance between the power supply pins and decoupling capacitors
must be avoided. (See reference board documentation for additional information.)
For a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin
(BST_X) to the power-stage output pin (OUT_X). When the power-stage output is low, the bootstrap capacitor is
charged through an internal diode connected between the gate-drive power-supply pin (GVDD_X) and the
bootstrap pin. When the power-stage output is high, the bootstrap capacitor potential is shifted above the output
potential and thus provides a suitable voltage supply for the high-side gate driver. In an application with PWM
switching frequencies in the range from 300kHz to 4000kHz, it is recommended to use 33nF ceramic capacitors,
size 0603 or 0805, for the bootstrap supply. These 33-nF capacitors ensure sufficient energy storage, even
during minimal PWM duty cycles, to keep the high-side power stage FET (LDMOS) fully turned on during the
remaining part of the PWM cycle.
Special attention should be paid to the power-stage power supply; this includes component selection, PCB
placement, and routing. As indicated, each half-bridge has independent power-stage supply pins (PVDD_X). For
optimal electrical performance, EMI compliance, and system reliability, it is important that each PVDD_X pin is
decoupled with a 2mF ceramic capacitor placed as close as possible to each supply pin. It is recommended to
follow the PCB layout of the TAS5612A reference design. For additional information on recommended power
supply and required components, see the application diagrams in this data sheet.
The 12V supply should be from a low-noise, low-output-impedance voltage regulator. Likewise, the 32.5V
power-stage supply is assumed to have low output impedance and low noise. The power-supply sequence is not
critical as facilitated by the internal power-on-reset circuit. Moreover, the TAS5612A is fully protected against
erroneous power-stage turn on due to parasitic gate charging. Thus, voltage-supply ramp rates (dV/dt) are
non-critical within the specified range (see the Recommended Operating Conditions table of this data sheet).
SYSTEM POWER-UP/POWER-DOWN SEQUENCE
Powering Up
The TAS5612A does not require a power-up sequence. The outputs of the H-bridges remain in a
high-impedance state until the gate-drive supply voltage (GVDD_X) and VDD voltage are above the undervoltage
protection (UVP) voltage threshold (see the Electrical Characteristics table of this data sheet). Although not
specifically required, it is recommended to hold RESET in a low state while powering up the device. This allows
an internal circuit to charge the external bootstrap capacitors by enabling a weak pulldown of the half-bridge
output.
Powering Down
The TAS5612A does not require a power-down sequence. The device remains fully operational as long as the
gate-drive supply (GVDD_X) voltage and VDD voltage are above the undervoltage protection (UVP) voltage
threshold (see the Electrical Characteristics table of this data sheet). Although not specifically required, it is a
good practice to hold RESET low during power down, thus preventing audible artifacts including pops or clicks.
18
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TAS5612A
相关PDF资料
PDF描述
TAS5613ADKD 150 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO44
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TAS5613PHD 150 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
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