参数资料
型号: TAS5631PHD
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: AUDIO AMPLIFIER, PQFP64
封装: GREEN, PLASTIC, HTQFP-64
文件页数: 29/34页
文件大小: 1823K
代理商: TAS5631PHD
SLES221C – JULY 2009 – REVISED APRIL 2010
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
TAS5631
UNIT
VDD to AGND
–0.3 to 13.2
V
GVDD to AGND
–0.3 to 13.2
V
PVDD_X to GND_X(2)
–0.3 to 69
V
OUT_X to GND_X(2)
–0.3 to 69
V
BST_X to GND_X(2)
–0.3 to 82.2
V
BST_X to GVDD_X(2)
–0.3 to 69
V
VREG to AGND
–0.3 to 4.2
V
GND_X to GND
–0.3 to 0.3
V
GND_X to AGND
–0.3 to 0.3
V
GND to AGND
–0.3 to 0.3
V
INPUT_X, OC_ADJ, M1, M2, M3, OSC_IO+, OSC_IO–, FREQ_ADJ, VI_CM, C_STARTUP,
–0.3 to 4.2
V
PSU_REF to AGND
RESET, SD, OTW1, OTW2, CLIP, READY to AGND
–0.3 to 7
V
Maximum continuous sink current (SD, OTW1, OTW2, CLIP, READY)
9
mA
Maximum operating junction temperature range, TJ
0 to 150
°C
Storage temperature, Tstg
–40 to 150
°C
Human-body model(3) (all pins)
±2
kV
Electrostatic discharge
Charged-device model(3) (all pins)
±500
V
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
These voltages represents the dc voltage + peak ac waveform measured at the terminal of the device in all conditions.
(3)
Failure to follow good anti-static ESD handling during manufacture and rework contributes to device malfunction. Make sure the
operators handling the device are adequately grounded through the use of ground straps or alternative ESD protection.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN NOM
MAX
UNIT
PVDD_x
Half-bridge supply
DC supply voltage
25
50
52.5
V
Supply for logic regulators and gate-drive
GVDD_x
DC supply voltage
10.8
12
13.2
V
circuitry
VDD
Digital regulator supply voltage
DC supply voltage
10.8
12
13.2
V
RL(BTL)
3.5
4
Output filter according to schematics in
RL(SE)
Load impedance
1.8
2
the application information section.
RL(PBTL)
1.6
2
LOUTPUT(BTL)
7
10
LOUTPUT(SE)
Output filter inductance
Minimum output inductance at IOC
7
15
mH
LOUTPUT(PBTL)
7
10
fPWM
PWM frame rate
352
384
500
kHz
TJ
Junction temperature
0
150
°C
TERMINAL FUNCTIONS
TERMINAL
Function(1)
DESCRIPTION
NAME
PHD NO.
DKD NO.
AGND
8
10
P
Analog ground
BST_A
54
43
P
HS bootstrap supply (BST); external 0.033-mF capacitor to OUT_A required
BST_B
41
34
P
HS bootstrap supply (BST); external 0.033-mF capacitor to OUT_B required
(1)
I = Input, O = Output, P = Power
4
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS5631
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