参数资料
型号: TB1311AFG
元件分类: 信号分离
英文描述: SYNC SEPARATOR IC, PQFP80
封装: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件页数: 44/46页
文件大小: 948K
代理商: TB1311AFG
TB1311AFG
2006-05-29
7
Pin Functions
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Pin
No.
Pin Name
Function
Interface Circuit
Input Signal/Output Signal
29
Vdd (3.3 V)
VCC pin for the logical circuits.
Supply power through a resistor from pin 11
as in the Application Circuit. This pin voltage
is clipped to 3.3 V (typ.) by the internal
regulator.
29
11
27
500Ω
3.3V
3.3 V (typ.)
27
Vss
GND pin for the logical circuits.
11
V/S VCC (5 V)
VCC pin for the sync and video circuits.
Connect 5.0 V (typ.)
5.0 V (typ.)
16
V/S GND
GND pin for the sync and video circuits.
24
AU VCC (9 V)
VCC pin for the audio circuits.
Connect 9.0 V (typ.)
9.0 V (typ.)
32
AU GND
GND pin for the audio circuits.
36
38
41
61
57
77
CVBS3 IN
CVBS4 IN
CVBS5 IN
CVBS6 IN
SY1 IN
SY2 IN
CVBS or Y input pin.
Input the CVBS or Y signal in NTSC, PAL or
SECAM via a clamp capacitor.
Sync tip level: 2.3 V (typ.)
Y/CVBS signal amplitude:
1.0 Vp-p (with sync)
59
79
SC1 IN
SC2 IN
Chroma signal input pin.
Input C signal via a capacitor.
The voltage of this pin is detected and the
status is returned to the I
2CBUS Read
functions, S4 or S8. It is used for detecting
whether the S-pin is connected or not.
1V
100.
2k
Ω
3V
2.9 V bias (typ.)
Burst signal amplitude:
0.3 Vp-p
49
69
55
75
Y1/G1 IN
Y2/G2 IN
Y3/G3 IN
Y4/G4 IN
Y, G or CVBS input pin.
Input the signal via a clamp capacitor.
The clamp system is selectable by
CLAMP1, 2, 3 or 4 registers.
11
16
49
55
69
75
3V
/1.
5V
200Ω
100.
2k
Ω
200Ω
3V
Sync tip level: 2.3 V (typ.)
Bias level: 2.9 V (typ.)
Y/G/CVBS signal amplitude:
1.0 Vp-p (with sync)
47
67
53
73
Cb1/B1 IN
Cb2/B2 IN
Cb3/B3 IN
Cb4/B4 IN
Cb, B or C input pin.
Input the signal via a capacitor.
1V
100.
2k
Ω
3V
2.9 V bias (typ.)
Cb/B signal amplitude:
0.7 Vp-p (without sync)
Burst signal amplitude:
0.3 Vp-p
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