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参数资料
| 型号： | TC3401EPE |
| 元件分类： | ADC |
| 英文描述： | 2-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP16 |
| 封装： | PLASTIC, DIP-16 |
| 文件页数： | 5/12页 |
| 文件大小： | 70K |
| 代理商： | TC3401EPE |
2
16-BIT LOW COST, LOW POWER
∑ – A/D CONVERTER
TC3401
TC3401- 1
10/14/99
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ........................................................... 6.0V
Voltage on Pins:
PFO, RESET, .................................. (GND – 0.3V) to 5.5V
Input Voltage (All Other Pins) ............................................
..................................... (GND – 0.3V) to (VDD + 0.3V)
Operating Temperature .................................. 0
°C to 85°C
Maximum Chip Temperature ................................. +150
°C
Storage Temperature Range ................ – 65
°C to +150°C
Lead Temperature (Soldering, 10 sec) ................. +300
°C
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.
Notes:
1. Differential input voltage defined as (VIN+ – VIN–)
2. Resistance from INn+ to INn– or INn to GND.
DC ELECTRICAL CHARACTERISTICS: TA = 25°C and VDD = 2.7V, unless otherwise specified. Specifications
in Bold type apply over a temperature range of 0
°C to 85°C. VREF = .25V, Internal Clock Freq = 520kHz
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
POWER SUPPLY
VDD
Supply Voltage
1.8
—
5.5
V
IDD
Supply Current, During Data Conversion
—
300
—
A
IDD(SLEEP)
Supply Current, Sleep Mode
TA = +25°C
—
50
80
A
IDD(SLEEP)
—
50
130
A
ACCURACY (Differential Inputs)
RES
Resolution
—
16
—
Bits
INL
Integral Non-Linearity
VDD = 2.7V
—
.0038
—
%FSR
VOS
Offset Error
IN
+ = IN– = 0V
—
±0.9
%FSR
VNOISE
Refered to input
—
60
—
Vrms
CMR
Common Mode Rejection
at DC
—
75
—
dB
FSE
Full Scale Error
—
0.4%
—
%FS
PSRR
Power Supply Rejection Ratio
VDD = 2.5V to 3.5V
—
75
—
dB
INn+, INn
VIN±
Differential Input Voltage
(Note 1)
—
VDD
V
Absolute Voltage Range
GND
—
VDD
V
on INn
+, INn–, INn
Input Bias Current
—
1
100
nA
CIN
Input Sampling Capacitance
—
2
—
pF
RIN
Differential Input Resistance
(Note 2)
—
2.0
—
M
REFIN, REFOUT
VREF
REFIN Voltage Range
0
—
1.25
V
IREF
REFIN Input Current
—
1
—
A
VREFOUT
REFOUT Voltage
—
1.193
—
V
REFSINK
REFOUT Current Sink Capability
—
10
—
A
REFSRC
REFOUT Current Source Capability
300
—
A
SCLK, ADDR
VIL
Input Low Voltage
—
0.3 x VDD
V
VIH
Input High Voltage
0.7 x VDD
——
V
ILEAK
Leakage Current
—
1
—
A
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