参数资料
型号: TC4469COE713
厂商: Microchip Technology
文件页数: 10/22页
文件大小: 0K
描述: IC MOSFET DVR AND/INV 16SOIC
标准包装: 1
配置: 低端
输入类型: 反相和非反相
延迟时间: 40ns
电流 - 峰: 1.2A
配置数: 4
输出数: 4
电源电压: 4.5 V ~ 18 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC
包装: 剪切带 (CT)
产品目录页面: 671 (CN2011-ZH PDF)
其它名称: TC4469COE713CT
TC4467/TC4468/TC4469
P T = fV s ( 10 × 10 )
A resistive-load-caused dissipation for supply-
referenced loads is a function of duty cycle, load
current and output voltage. The power dissipation is
EQUATION
P L = DV O I L
D = Duty Cycle
EQUATION
– 9
C = 1000 pF Capacitive Load
V S = 15 V
D = 50%
f = 200 kHz
V O = Device Output Voltage
I L = Load Current
Quiescent power dissipation depends on input signal
duty cycle. Logic HIGH outputs result in a lower power
P D =
=
=
=
Package Power Dissipation
P L + P Q + P T
45mW + 35mW + 30mW
110mW
dissipation mode, with only 0.6 mA total current drain
(all devices driven). Logic LOW outputs raise the
current to 4 mA maximum. The quiescent power
dissipation is:
EQUATION
P Q = V S ( D ( I H ) + ( 1 – D ) I L )
I H = Quiescent Current with all outputs LOW
(4 mA max.)
I L = Quiescent Current with all outputs HIGH
(0.6 mA max.)
D = Duty Cycle
Package power dissipation is the sum of load,
quiescent and transition power dissipations. An
example shows the relative magnitude for each term:
Maximum operating temperature is:
EQUATION
T J – θ JA ( P D ) = 141 ° C
T J = Maximum allowable junction temperature
(+150 ° C )
θ JA = Junction-to-ambient thernal resistance
(83.3 ° C/W) 14-pin plastic package
V S = Supply Voltage
Transition power dissipation arises in the complimen-
tary configuration (TC446X) because the output stage
N-channel and P-channel MOS transistors are ON
simultaneously for a very short period when the output
changes. The transition power dissipation is
approximately:
V DD
Note:
Ambient operating temperature should not
exceed +85°C for "EJD" device or +125°C
for "MJD" device.
Input: 100 kHz,
1 μF Film
14
0.1 μF Ceramic
square wave,
t RISE = t FALL ≤ 10 nsec
1A
1B
2A
2B
1
2
3
4
13
12
V OUT
470 pF
+5 V
Input
(A, B)
0V
10%
90%
3A
3B
4A
4B
5
6
8
9
11
10
V DD
Output
0V
t D1
90%
10%
t R
t D2
90%
10%
t F
7
FIGURE 4-1:
DS21425B-page 10
Switching Time Test Circuit.
? 2002 Microchip Technology Inc.
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