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| 型号： | TC7107CLW713 |
| 厂商： | Microchip Technology |
| 文件页数： | 16/34页 |
| 文件大小： | 0K |
| 描述： | IC ADC 3 1/2DGT LED DVR 44-PLCC |
| 标准包装： | 500 |
| 显示器类型： | LED |
| 配置： | 7 段显示 |
| 数字或字符： | A/D，3.5 位数字 |
| 电流 - 电源： | 800µA |
| 电源电压： | 5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LCC（J 形引线） |
| 供应商设备封装： | 44-PLCC |
| 包装： | 带卷 (TR) |
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TC7106/A/TC7107/A
8.0
DEVICE PIN FUNCTIONAL
DESCRIPTION
8.2
Differential Reference
V REF + (Pin 36), V REF - (Pin 35)
8.1
Differential Signal Inputs
The reference voltage can be generated anywhere
within the V+ to V- power supply range.
V IN + (Pin 31), V IN - (Pin 30)
The TC7106A/TC7107A is designed with true
differential inputs and accepts input signals within the
input stage common mode voltage range (V CM ). The
typical range is V+ – 1.0 to V+ + 1V. Common mode
voltages are removed from the system when the
TC7106A/TC7107A operates from a battery or floating
power source (isolated from measured system) and
V IN - is connected to analog common (V COM ) (see
To prevent rollover type errors being induced by large
Common mode voltages, C REF should be large
compared to stray node capacitance.
The TC7106A/TC7107A circuits have a significantly
lower analog common temperature coefficient. This
gives a very stable voltage suitable for use as a
reference. The temperature coefficient of analog
common is 20 ppm/°C typically.
8.3
Analog Common (Pin 32)
In systems where Common mode voltages exist, the
86 dB Common mode rejection ratio minimizes error.
Common mode voltages do, however, affect the
integrator output level. Integrator output saturation
must be prevented. A worst-case condition exists if a
large positive V CM exists in conjunction with a full scale
negative differential signal. The negative signal drives
the integrator output positive along with V CM (see
swing can be reduced below the recommended 2.0V
full scale swing. The integrator output will swing within
0.3V of V+ or V- without increasing linearity errors.
The analog common pin is set at a voltage potential
approximately 3.0V below V+. The potential is between
2.7V and 3.35V below V+. Analog common is tied
internally to the N channel FET capable of sinking
20 mA. This FET will hold the common line at 3.0V
should an external load attempt to pull the common line
toward V+. Analog common source current is limited to
10 μA. Analog common is, therefore, easily pulled to a
more negative voltage (i.e., below V+ – 3.0V).
The TC7106A connects the internal V IN + and V IN -
inputs to analog common during the auto-zero cycle.
During the reference integrate phase, V IN - is
Input Buffer
C I
connected to analog common. If V IN - is not externally
connected to analog common, a Common mode
+
+
R I
voltage exists. This is rejected by the converter ’s 86 dB
V IN
–
–
+
Integrator
V I
Common mode rejection ratio. In battery operation,
analog common and V IN - are usually connected,
removing Common mode voltage concerns. In systems
–
where V- is connected to the power supply ground, or
[ V CM – V IN
T I = Integration Time
V CM
Where:
V I =
T I
R I C I
=
4000
F OSC
to a given voltage, analog common should be
connected to V IN -.
C I = Integration Capacitor
R I = Integration Resistor
FIGURE 8-1: Common Mode Voltage
Reduces Available Integrator Swing (V COM ≠ V IN ).
DS21455D-page 16
? 2008 Microchip Technology Inc.
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