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参数资料
| 型号： | TDA10023HT |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封装： | 10 X 10 MM, 1 MM HEIGHT, PLASTIC, MS-026, SOT-357-1, TQFP-64 |
| 文件页数： | 14/20页 |
| 文件大小： | 101K |
| 代理商： | TDA10023HT |
9397 750 14559
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 April 2005
3 of 20
Philips Semiconductors
TDA10023HT
Single chip DVB-C/MCNS channel receiver
4.
Quick reference data
Table 1:
Quick reference data
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Recommended operating conditions
VDDD3
digital core supply voltage
1.65
1.8
1.95
V
VDDD2
digital pad supply voltage
3
3.3
3.6
V
Tamb
ambient temperature
0
-
70
°C
VIH
HIGH-level input voltage (including
voltage on outputs in 3-state mode)
all digital inputs are 5 V
tolerant except XIN which is
2 V tolerant
0.8VDDD3 -VDDD3
V
1.8
-
5.5
V
VIL
LOW-level input voltage (including
voltage on outputs in 3-state mode)
all digital inputs are 5 V
tolerant except XIN which is
2 V tolerant
0
-
0.2VDDD3 V
0-1V
VOH
HIGH-level output voltage
2.6
2.9
3.2
V
VOL
LOW-level output voltage
0
-
0.4
V
IOH
HIGH-level output current
VOH = VDDD2 0.4 V
4.8
-
mA
IOL
LOW-level output current
VOL = 0.4 V
4.2
-
mA
P
power dissipation
QAM 256 / symbol rate
6.9 MBd; fs = 29.33 MHz;
cs = 150 %
-
500
620
mW
Itot(3V3)
total current consumption for the
digital and analog 3.3 V supply
voltages (VDDD2, VDDD4, VDDA3)
QAM 256 / symbol rate
6.9 MBd; fs = 29.33 MHz;
cs = 150 %
-
94
100
mA
Itot(1V8)
total current consumption for the
digital and analog 1.8 V supply
voltages (VDDD1, VDDD3, VDDA2)
QAM 256 / symbol rate
6.9 MBd; fs = 29.33 MHz;
cs = 150 %
-
105
130
mA
Ci
input capacitance
-
6
pF
Crystal oscillator characteristics
VDDA1
crystal analog supply voltage
1.65
1.8
1.95
V
IDDA1
supply current in Slave mode
at maximum fc
-
1.12
mA
fi(slave)
input frequency in Slave mode
1
-
50
MHz
fc
output frequency
1
-
50
MHz
VXIN
XIN input level in Slave mode
AC coupled
400
900
-
mV
tstart
average start-up time
-
500
-
s
Slope
XIN clock signal slope
25
-
V/
s
PLL characteristics
VDDA2
analog PLL supply voltage
1.6
1.8
2.0
V
VDDD1
digital PLL supply voltage
1.65
1.8
1.95
V
IDDA2
analog supply current
-
1
-
mA
IDDD1
digital supply current
-
1
-
mA
fref
input frequency
0.1
-
150
MHz
fout
output frequency
4.3
-
550
MHz
tPU
start-up time to power-up
-
500
s
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