参数资料
型号: TDA6403M-T
厂商: NXP SEMICONDUCTORS
元件分类: 调谐器
英文描述: 2-BAND, VIDEO TUNER, PDSO28
封装: PLASTIC, SOT-341, SSOP-28
文件页数: 2/44页
文件大小: 241K
代理商: TDA6403M-T
2000 Jan 24
10
Philips Semiconductors
Product specication
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Table 8
Reference divider ratio select bits
Note
1. X = don’t care.
RSA
RSB
REFERENCE DIVIDER RATIO
FREQUENCY STEP (kHz)
X(1)
0
640
6.25
0
1
1024
3.90625
1
512
7.8125
READ MODE; R/W = 1 (see Table 9)
Data can be read from the device by setting the R/W bit to
logic 1. After the slave address has been recognized, the
device generates an acknowledge pulse and the first data
byte (status byte) is transferred on the SDA line (MSB
first). Data is valid on the SDA line during a HIGH-level of
the SCL clock signal. A second data byte can be read from
the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge).
End of transmission will occur if no master acknowledge
occurs. The device will then release the data line to allow
the microcontroller to generate a STOP condition.
The POR flag is set to logic 1 at power-on. The flag is reset
when an end-of-data is detected by the device (end of a
READ sequence). Control of the loop is made possible
with the in-lock flag FL which indicates when the loop is
locked (FL = 1).
The automatic charge pump switch flag (ACPS) is LOW
when the automatic charge pump switch mode is ‘ON’ and
the loop is locked. In other conditions, ACPS = 1.
When ACPS = 0, the charge pump current is forced to the
LOW value.
A built-in ADC is available on LOCK/ADC pin (I2C-bus
mode only). This converter can be used to apply AFC
information to the microcontroller from the IF section of the
television. The relationship between the bits A2, A1 and A0
is given in Table 11.
Table 9
Read data format
Note
1. MSB is transmitted first.
Table 10 Description of symbols used in Table 9
NAME
BYTE
BITS
ACK
MSB(1)
LSB
Address byte
ADB
11000
MA1
MA0
R/W = 1
A
Status byte
SB
POR
FL
ACPS
1
A2
A1
A0
SYMBOL
DESCRIPTION
A
acknowledge
POR
power-on reset ag (POR = 1 at power-on)
FL
in-lock ag (FL = 1 when the loop is locked)
ACPS
automatic charge pump switch ag:
ACPS = 0; active
ACPS = 1; not active
A2, A1, A0
digital outputs of the 5-level ADC
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