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| 型号： | TDA6405ATS/C1 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 调谐器 |
| 英文描述： | VIDEO TUNER, PDSO28 |
| 封装： | PLASTIC, SOT-341, SSOP-28 |
| 文件页数： | 34/35页 |
| 文件大小： | 262K |
| 代理商： | TDA6405ATS/C1 |
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1999 Jan 13
8
Philips Semiconductors
Product specication
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Table 4
Address selection I2C-bus
Table 5
Test mode
Notes
1. This is the default mode at Power-on reset.
2. The ADC input cannot be used when these test modes are active.
Table 6
Reference divider ratio select bits
MA1
MA0
VOLTAGE APPLIED ON AS INPUT
0
0 to 0.1VCC
0
1
open or 0.2VCC to 0.3VCC
1
0
0.4VCC to 0.6VCC
1
0.9VCC to 1.0VCC
T2
T1
T0
TEST MODES
0
automatic charge pump off
0
1
automatic charge pump on; note 1
0
1
X
charge pump is ‘OFF’
1
0
charge pump is sinking current
1
charge pump is sourcing current
100
fREF is available on pin ADC; note 2
101
1
2fDIV is available on pin ADC; note 2
RSA
RSB
REFERENCE DIVIDER RATIO
FREQUENCY STEP (kHz)
X
0
640
6.25
0
1
1024
3.90625
1
512
7.8125
Read mode
Data can be read from the devices by setting the R/W bit
to logic 1 (see Tables 7 and 8). After the slave address
has been recognized, the devices generate an
acknowledge pulse and the first data byte (status byte) is
transferred on the SDA line (MSB first). Data is valid on the
SDA line during a HIGH-level of the SCL clock signal.
A second data byte can be read from the devices if the
processor generates an acknowledge on the SDA line
(master acknowledge). End of transmission will occur if no
master acknowledge occurs. The devices will then release
the data line to allow the processor to generate a STOP
condition. The POR flag is set to logic 1 at power-on.
The flag is reset when an end-of-data is detected by the
devices (end of a read sequence). Control of the loop is
made possible with the in-lock flag FL which indicates
when the loop is locked (FL = 1).
The ACPS flag is LOW when the automatic charge pump
switch mode is ‘ON’ and the loop is locked. In other
conditions, ACPS = 1. When ACPS = 0, the charge pump
current is forced to the LOW value.
A built-in ADC is available on ADC pin. This converter can
be used to apply AFC information to the controller from the
IF section of the television. The relationship between the
bits A2, A1 and A0 is given in Table 9.
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