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参数资料
| 型号： | TDA8768H/5/C1 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 封装： | PLASTIC, SOT-307-2, QFP-44 |
| 文件页数： | 6/23页 |
| 文件大小： | 183K |
| 代理商： | TDA8768H/5/C1 |
1998 Aug 26
14
Philips Semiconductors
Preliminary specication
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8768
Fig.6 Application diagram for differential clock input (PECL-compatible) using a TTL to PECL translator.
If the clock lines are more than 1 inch long they must be matched. In fact, the 27
resistor will be changed
by the series connection of R1 and R2, with R1 = Zo placed close to pins CLK and CLK.
(1) 50
matched line (Zo, L).
handbook, full pagewidth
MGL474
TDA8768
TRANSLATOR
PECL
CLK
35
36
D
(1)
270
270
100 nF
Z0 = 50
Z0 = 50
R1
500
R1
500
R2
220
R2
220
TTL
input
Fig.7
Application diagram for differential clock input (PECL-compatible) using a TTL to PECL translator
and Thevenin parallel terminations.
The value of R1 and R2 must be chosen in order to meet the following relations:
and
(1) 50
matched line (Z
o, L).
3V
V
CCD
R2
×
R1
R2
+
-----------------------------
=
Z0
R1
R2
×
R1
R2
+
----------------------
=
handbook, full pagewidth
MGL473
TDA8768
TRANSLATOR
PECL
CLK
35
36
D
VCCD
(1)
R2
120
R2
120
100 nF
R1
82
R1
82
TTL
input
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