参数资料
型号: TEA1753LT/N1,518
厂商: NXP Semiconductors
文件页数: 14/32页
文件大小: 0K
描述: IC CTLR SMPS SW MODE 16SO
标准包装: 2,500
系列: GreenChip™ III
输出隔离: 隔离
频率范围: 100kHz ~ 150kHz,250kHz
输入电压: 16 V ~ 38 V
输出电压: 650V
功率(瓦特): 600mW
工作温度: -40°C ~ 150°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SO
包装: 带卷 (TR)
NXP Semiconductors
TEA1753LT
HV start-up flyback controller with integrated PFC controller
A Voltage Controlled Oscillator (VCO) controls the frequency at very low power and
standby levels. The minimum frequency is reduced to zero. During frequency reduction
mode, the primary peak current is kept at an adjustable minimal level to maintain a high
efficiency. As the primary peak current is low in frequency reduction operation, no audible
noise is noticeable at switching frequencies in the audible range. Valley switching is also
active in this mode.
In frequency reduction mode, the PFC controller is switched off. The flyback maximum
frequency changes linearly with the control voltage on the FBCTRL pin (see Figure 9 ).
Hysteresis has been added for stable on and off switching of the PFC. At no-load
operation, the switching frequency is reduced to (almost) zero.
The input voltage of the flyback converter and the capacitance on the drain node of the
flyback power switch affect the frequency reduction slope. By choosing the proper
compensation, the frequency reduction slope for high input voltages is chosen as the
same as for low input voltages. This compensation yields an input voltage independent
PFC switch-on and switch-off power level (see the application information in Section 11 ).
f sw(fb)max
flyback
switching
frequency
PFC off
frequency
PFC on
discontinuous
with valley
Fig 9.
reduction
1.5 V
Frequency control of flyback
switching
V FBCTRL
quasi-resonant
014aaa746
7.3.2 Valley switching (HV pin)
A new cycle starts when the external MOSFET is switched on. V FBSENSE and V FBCTRL
determine the on-time. The MOSFET is then switched off and the secondary stroke starts.
After the secondary stroke, the drain voltage shows an oscillation with a frequency of
approximately:
f = ---------------------------------------------------
1
? 2 ? ? ? ? L p ? C d ? ?
where L p is the primary self-inductance of the flyback transformer and C d is the
capacitance on the drain node.
When the internal oscillator voltage is high and the secondary stroke ended, the circuit
waits for the lowest drain voltage before starting a new primary stroke.
(3)
TEA1753LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 24 August 2012
? NXP B.V. 2012. All rights reserved.
14 of 32
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