- 您现在的位置：买卖IC网 > PDF目录98219 > THS1207CDA (TEXAS INSTRUMENTS INC) 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 PDF资料下载
参数资料
| 型号： | THS1207CDA |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| 封装： | GREEN, PLASTIC, TSSOP-32 |
| 文件页数： | 6/32页 |
| 文件大小： | 317K |
| 代理商： | THS1207CDA |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
THS1207
SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002
www.ti.com
14
DETAILED DESCRIPTION
Reference Voltage
The THS1207 has a built-in reference, which provides the reference voltages for the ADC. VREFP is set to 3.5 V
and VREFM is set to 1.5 V. An external reference can also be used through two reference input pins, REFP
and REFM, if the reference source is programmed as external. The voltage levels applied to these pins establish
the upper and lower limits of the analog inputs to produce a full-scale and zero-scale reading respectively.
Analog Inputs
The THS1207 consists of 4 analog inputs, which are sampled simultaneously. These inputs can be selected
individually and configured as single-ended or differential inputs. The desired analog input channel can be
programmed.
Converter
The THS1207 uses a 12-bit pipelined multistaged architecture, which achieves a high sample rate with low
power consumption. The THS1207 distributes the conversion over several smaller ADC sub-blocks, refining
the conversion with progressively higher accuracy as the device passes the results from stage to stage. This
distributed conversion requires a small fraction of the number of comparators used in a traditional flash ADC.
A sample-and-hold amplifier (SHA) within each of the stages permits the first stage to operate on a new input
sample while the second through the eighth stages operate on the seven preceding samples.
Conversion Clock
An external clock signal with a duty cycle of 50% has to be applied to the clock input (CONV_CLK). A new
conversion is started with every falling edge of the applied clock signal. The conversion values are available
at the output with a latency of 5 clock cycles.
SYNC
In multichannel mode, the first SYNC signal is delayed by [7+ (# Channels Sampled)] cycles of the CONV_CLK
after a SYNC reset. This is due to the latency of the pipeline architecture of the THS1207.
Sampling Rate
The maximum possible conversion rate per channel is dependent on the selected analog input channels.
Table 1 shows the maximum conversion rate in the continuous conversion mode for different combinations.
Table 1. Maximum Conversion Rate
CHANNEL CONFIGURATION
NUMBER OF
CHANNELS
MAXIMUM CONVERSION
RATE PER CHANNEL
1 single-ended channel
1
6 MSPS
2 single-ended channels
2
3 MSPS
3 single-ended channels
3
2 MSPS
4 single-ended channels
4
1.5 MSPS
1 differential channel
1
6 MSPS
2 differential channels
2
3 MSPS
1 single-ended and 1 differential channel
2
3 MSPS
2 single-ended and 1 differential channels
3
2 MSPS
The maximum conversion rate in the continuous conversion mode per channel, fc, is given by:
fc
+ 6 MSPS
# channels
Conversion
During conversion the ADC operates with a free running external clock applied to the input CONV_CLK. With
every falling edge of the CONV_CLK signal a new converted value is available to the databus with the
corresponding read signal. The THS1207 allows up to four analog input to be selected. The inputs can be
configured as two differential channels, four single-ended channels or a combination of differential and
single-ended.
相关PDF资料 |
PDF描述 |
|---|---|
| THS1207IDA | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1207CDAR | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1207IDAR | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1207IDAG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1207CDAG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| THS1207CDAG4 | 功能描述:模数转换器 - ADC 12-Bit 6MSPS Simult Sampling Quad Ch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1207CDAR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| THS1207EVM | 制造商:Texas Instruments 功能描述:THS1207 ANALOG TO DIGITAL CONVERTER EVM - Bulk |
| THS1207IDA | 功能描述:模数转换器 - ADC 12-Bit 6MSPS Simult Sampling Quad Ch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1207IDAG4 | 功能描述:模数转换器 - ADC 12-Bit 6MSPS Simult Sampling Quad Ch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
发布紧急采购，3分钟左右您将得到回复。