参数资料
型号: THS1230IPW
厂商: Texas Instruments
文件页数: 4/25页
文件大小: 0K
描述: IC 12 BIT 30 MSPS A/D 28-TSSOP
产品培训模块: Data Converter Basics
标准包装: 50
位数: 12
采样率(每秒): 30M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 220mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 管件
输入数目和类型: 1 个差分,单极
产品目录页面: 895 (CN2011-ZH PDF)
配用: 296-10012-ND - EVALUATION MODULE FOR THS1230
其它名称: 296-2838-5
www.ti.com
AIN
0
4095
2V
MODE 2, CON[1:0] = 10
OUTPUT
CODE
AIN
0
4095
1V
MODE 1, CON[1:0] = 01
OUTPUT
CODE
AIN+
Signal Processing Chain (Sample and Hold, ADC)
THS1230
SLAS291B – OCTOBER 2000 – REVISED MARCH 2004
Table 1. Input Modes of Operation
MODE
CON1
CON0
MODE OF OPERATION
0
Device powered down
1
0
1
Differential mode
× 1
2
1
0
Differential mode
× 0.5
3
1
Not used
Modes 1 and 2 are shown in Figure 14.
Figure 14. Input Mode Configurations
The gain of the sample and hold changes with the CON1 and the CON0 inputs. Table 2 shows the gain of the
sample and hold and the levels applied at the AIN+ and AIN– analog inputs for Mode 1 and Mode 2. The
common mode level for the two analog inputs is at AVDD/2.
Table 2. Input Mode Switching
(AIN+) – (AIN–)
MODE
CON1
CON0
S/H GAIN
MIN
MAX
1
0
1
–1 V
1 V
×1
2
1
0
–2 V
2 V
×0.5
Table 2 assumes that the delta in ADC reference voltages VREFT and VREFB is set to 1 V, i.e., VREFT – VREFB = 1
V. Note that VREFB and VREFT can be set externally, which will scale the numbers given in this table.
The user-chosen operating configuration and reference voltages determine what input signal voltage range the
THS1230 can handle.
The following sections explain both the internal signal flow of the device and how the input signal span is related
to the ADC reference voltages, as well as the ways in which the ADC reference voltages can be buffered
internally or externally applied.
Figure 15 shows the signal flow through the sample and hold unit and the PGA to the ADC core.
12
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