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参数资料
| 型号： | THS7002IPWP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封装： | GREEN, PLASTIC, HTSSOP-28 |
| 文件页数： | 14/41页 |
| 文件大小： | 1203K |
| 代理商： | THS7002IPWP |
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THS7001, THS7002
70MHz PROGRAMMABLEGAIN AMPLIFIERS
SLOS214C OCTOBER 1998 REVISED MARCH 2007
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
output clamping
Typically, the output of the PGA will directly drive an analog-to-digital converter (ADC). Because of the limited
linear input range and saturation characteristics of most ADCs, the PGA’s outputs incorporate a voltage clamp.
Unlike a lot of clamping amplifiers which clamp only at the input, the THS7001 and THS7002 clamps at the
output stage. This insures that the output will always be protected regardless of the Gain setting and the input
voltage. The clamps activate almost instantaneously and recover from saturation in less than 7 ns. This can be
extremely important when the THS7001 and THS7002 is used to drive some ADCs which have a very long
overdrive recovery time. It is also recommended to add a pair of high frequency bypass capacitors to the clamp
inputs. These capacitors will help eliminate any ringing which may ocur when a large pulse is applied to the
amplifier. This pulse will force the clamp diodes to abruptly turn on, drawing current from the reference voltages.
Just like a power supply trace, you must minimize the inductance seen by the clamp pins. The bypass capacitors
will supply the sudden current demands when the clamps are suddenly turned on. A simplified clamping circuit
diagram is shown in Figure 57.
+VCC
VCC
To Bias Circuits
VH
VL
OUT
Output
Transistor
Output
Transistor
Drive
V1
0.1
F
V2
0.1
F
Figure 57. Simplified THS7001 and THS7002 Clamp Circuit
Because the internal clamps utilize the same clamping reference voltages, the outputs of both PGAs on the
THS7002 are clamped to the same values. These clamps are typically connected to the power supply pins to
allow a full output range. But, they can be connected to any voltage reference desired. The clamping range is
limited to +VCC and GND for VH and –VCC and GND for VL. It is possible to go beyond GND for each respective
clamp, but it is not recommended. This is because this operation relies on the internal bias currents in the Class
AB output stage to maintain their linearity. There may also be a chance to reverse bias the PN junctions and
possibly cause internal damage to these junctions. But for reference, the graphs in Figure 58 show the output
voltage versus the clamping voltage with different loads.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| THS7002IPWPG4 | 功能描述:特殊用途放大器 70-MHz Hi-Spd Dual Prgrmbl-Gain Amp RoHS:否 制造商:Texas Instruments 通道数量:Single 共模抑制比（最小值）: 输入补偿电压: 工作电源电压:3 V to 5.5 V 电源电流:5 mA 最大功率耗散: 最大工作温度:+ 70 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-20 封装:Reel |
| THS7002IPWPR | 功能描述:运算放大器 - 运放 70-MHz Programmable- Gain Dual RoHS:否 制造商:STMicroelectronics 通道数量:4 共模抑制比（最小值）:63 dB 输入补偿电压:1 mV 输入偏流（最大值）:10 pA 工作电源电压:2.7 V to 5.5 V 安装风格:SMD/SMT 封装 / 箱体:QFN-16 转换速度:0.89 V/us 关闭:No 输出电流:55 mA 最大工作温度:+ 125 C 封装:Reel |
| THS7002PWP | 制造商:TI 制造商全称:Texas Instruments 功能描述:70-MHz PROGRAMMABLE-GAIN AMPLIFIERS |
| THS7102 | 制造商:TI 制造商全称:Texas Instruments 功能描述:ADSL (POTS) CENTRAL OFFICE LINE INTERFACE DRIVER/RECEIVER |
| THS7103 | 制造商:TI 制造商全称:Texas Instruments 功能描述:ADSL (ISDN) CENTRAL OFFICE LINE INTERFACE DRIVER/RECEIVER |
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