THS7001, THS7002
70MHz PROGRAMMABLEGAIN AMPLIFIERS
SLOS214C OCTOBER 1998 REVISED MARCH 2007
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
preamp operating characteristics, G = 2, TA = 25°C, RL = 150 , (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SR
Slew rate (see Note 4)
G = 1
VO = ±2 V,
VCC = ±5 V
65
V/ s
SR
Slew rate (see Note 4)
G = 1
VO = ±10 V,
VCC = ±15 V
85
V/
s
Settling time to 0.1%
VCC = ±5 V
85
ts
Settling time to 0.1%
G = 1,
VCC = ±15 V
70
ns
ts
Settling time to 0.01%
G = 1,
5 V Step
VCC = ±5 V
95
ns
Settling time to 0.01%
5 V Step
VCC = ±15 V
90
THD
Total harmonic distortion
VCC = ±15 V,
VO(PP) = 2V
fc = 1 MHz,
RL = 250
88
dBc
Vn
Input noise voltage
VCC = ±5 V or ±15 V,
f = 10 kHz
1.7
nV/
√Hz
In
Input noise current
VCC = ±5 V or ±15 V,
f = 10 kHz
0.9
pA/
√Hz
BW
Small-signal bandwidth (3 dB)
VO(PP) = 0.4V,
VCC = ±5 V
85
MHz
BW
Small-signal bandwidth (3 dB)
VO(PP) = 0.4V,
G = 2
VCC = ±15 V
100
MHz
Bandwidth for 0.1 dB flatness
VO(PP) = 0.4V,
VCC = ±5 V
35
MHz
Bandwidth for 0.1 dB flatness
VO(PP) = 0.4V,
G = 2
VCC = ±15 V
45
MHz
Full power bandwidth (see Note 5)
VCC = ±5 V,
VO = 5 VO(PP)
4.1
MHz
Full power bandwidth (see Note 5)
VCC = ±15 V,
VO = 20 VO(PP)
1.4
MHz
AD
Differential gain error
G = 2, 100 IRE,
VCC = ±5 V
0.02%
AD
Differential gain error
G = 2, 100 IRE,
NTSC
VCC = ±15 V
0.02%
φD
Differential phase error
G = 2,
100 IRE,
VCC = ±5 V
0.01
°
φD
Differential phase error
G = 2,
100 IRE,
NTSC
VCC = ±15 V
0.01
°
VCC = ±5 V,
VO = ±2.5 V,
TA = 25°C
85
89
Open loop gain
CC
VO = ±2.5 V,
RL = 1 k
TA = full range
83
dB
Open loop gain
VCC = ±15 V,
TA = 25°C
86
91
dB
VCC = ±15 V,
VO = ±10 V, RL = 1 k
TA = full range
84
Channel-to-channel crosstalk (THS7002)
VCC = ±5 V or ±15 V,
f = 1 MHz
85
dB
Full range for the THS7001/02C is 0°C to 70°C. Full range for the THS7001/02I is 40°C to 85°C.
NOTES:
4. Slew rate is measured from an output level range of 25% to 75%.
5. Full power bandwidth = slew rate/2
π V(PP).
shutdown electrical characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Standby current, disabled
Preamp
VCC = ±5 V
0.2
0.3
ICC(standby)
Standby current, disabled
(per channel)
Preamp
VI(SHDN) = 2.5 V
VCC = ±15 V
0.65
0.8
mA
ICC(standby)
(per channel)
PGA
VI(SHDN) = 2.5 V
VCC = ±5 V or ±15 V
0.8
1.2
mA
VIH(SHDN)
Shutdown voltage for power up
VCC = ±5 V or ±15 V,
Relative to GND
0.8
V
VIL(SHDN)
Shutdown voltage for power down
VCC = ±5 V or ±15 V,
Relative to GND
2
V
IIH(SHDN)
Shutdown input current high
VCC = ±5 V or ±15 V,
VI(SHDN) = 5 V
300
400
A
IIL(SHDN)
Shutdown input current low
VCC = ±5 V or ±15 V,
VI(SHDN) = 0.5 V
25
50
A
tdis
Disable time
VCC = ±5 V or ±15 V,
Preamp and PGA
100
ns
ten
Enable time
VCC = ±5 V or ±15 V,
Preamp and PGA
1.5
s
Disable time and enable time are defined as the interval between application of the logic signal to SHDN and the point at which the supply current
has reached half its final value.