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参数资料
| 型号： | TLC2932IPW |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, 40 MHz, PDSO14 |
| 封装： | PLASTIC, TSSOP-14 |
| 文件页数： | 22/28页 |
| 文件大小： | 665K |
| 代理商： | TLC2932IPW |
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TLC2932
HIGH-PERFORMANCE PHASE-LOCKED LOOP
SLAS097E – SEPTEMBER 1994 – REVISED MAY 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
VCO output frequency 1/2 divider
The TLC2932 SELECT terminal sets the fosc or 1/2 fosc VCO output frequency as shown in Table 1. The 1/2
fosc output should be used for minimum VCO output jitter.
Table 1. VCO Output 1/2 Divider Function
SELECT
VCO OUTPUT
Low
fosc
High
1/2 fosc
VCO inhibit function
The VCO has an externally controlled inhibit function which inhibits the VCO output. A high level on the VCO
INHIBIT terminal stops the VCO oscillation and powers down the VCO. The output maintains a low level during
the power-down mode, refer to Table 2.
Table 2. VCO Inhibit Function
VCO INHIBIT
VCO OSCILLATOR
VCO OUTPUT
IDD(VCO)
Low
Active
Normal
High
Stopped
Low level
Power Down
PFD operation
The PFD is a high-speed, edge-triggered detector with an internal charge pump. The PFD detects the phase
difference between two frequency inputs supplied to FIN–A and FIN–B as shown in Figure 2. Nominally the
reference is supplied to FIN–A, and the frequency from the external counter output is fed to FIN–B.
FIN– A
FIN– B
PFD OUT
VOH
Hi-Z
VOL
Figure 2. PFD Function Timing Chart
PFD output control
A high level on the PFD INHIBIT terminal places the PFD output in the high-impedance state and the PFD stops
phase detection as shown in Table 3. A high level on the PFD INHIBIT terminal also can be used as the
power-down mode for the PFD.
Table 3. VCO Output Control Function
PFD INHIBIT
DETECTION
PFD OUTPUT
IDD(PFD)
Low
Active
Normal
High
Stopped
Hi-Z
Power Down
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| TLC2932IPWG4 | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2932IPWR | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2932IPWRG4 | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2933AIPW | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2933AIPWG4 | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
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