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参数资料
| 型号： | TLC2932IPW |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, 40 MHz, PDSO14 |
| 封装： | PLASTIC, TSSOP-14 |
| 文件页数： | 26/28页 |
| 文件大小： | 665K |
| 代理商： | TLC2932IPW |
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TLC2932
HIGH-PERFORMANCE PHASE-LOCKED LOOP
SLAS097E – SEPTEMBER 1994 – REVISED MAY 1997
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, VDD = 5 V
(unless otherwise noted)
VCO section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
IOH = – 2 mA
4
V
VOL
Low-level output voltage
IOL = 2 mA
0.5
V
VIT
Input threshold voltage at SELECT, VCO INHIBIT
1.5
2.5
3.5
V
II
Input current at SELECT, VCO INHIBIT
VI = VDD or GND
±1
A
Zi(VCO IN)
Input impedance
VCO IN = 1/2 VDD
10
M
IDD(INH)
VCO supply current (inhibit)
See Note 4
0.01
1
A
IDD(VCO)
VCO supply current
See Note 5
15
35
mA
NOTES:
4. Current into VCO VDD, when VCO INHIBIT = VDD, and PFD is inhibited.
5. Current into VCO VDD, when VCO IN = 1/2 VDD, RBIAS = 3.3 k, VCO INHIBIT = GND, and PFD is inhibited.
PFD section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
IOH = 2 mA
4.5
V
VOL
Low-level output voltage
IOL = 2 mA
0.2
V
IOZ
High-impedance-state output current
PFD INHIBIT = high,
VI = VDD or GND
±1
A
VIH
High-level input voltage at FIN–A, FIN–B
4.5
V
VIL
Low-level input voltage at FIN–A, FIN–B
1
V
VIT
Input threshold voltage at PFD INHIBIT
1.5
2.5
3.5
V
Ci
Input capacitance at FIN–A, FIN–B
5
pF
Zi
Input impedance at FIN–A, FIN–B
10
M
IDD(Z)
High-impedance-state PFD supply current
See Note 6
0.01
1
A
IDD(PFD)
PFD supply current
See Note 7
0.15
3
mA
NOTES:
6. Current into LOGIC VDD, when FIN–A, FIN–B = GND, PFD INHIBIT = VDD, no load, and VCO OUT is inhibited.
7. Current into LOGIC VDD, when FIN–A, FIN–B = 1 MHz (VI(PP) = 5 V, rectangular wave), PFD INHIBIT = GND, no load, and
VCO OUT is inhibited.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TLC2932IPWG4 | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2932IPWR | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2932IPWRG4 | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2933AIPW | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| TLC2933AIPWG4 | 功能描述:锁相环 - PLL PHASE LOCKED LOOP RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
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