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参数资料
| 型号： | TLC320AD50IPTR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP48 |
| 封装： | PLASTIC, QFP-48 |
| 文件页数： | 5/52页 |
| 文件大小： | 276K |
| 代理商： | TLC320AD50IPTR |
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1–6
1.6
Definitions and Terminology
ADC Channel
The ADC channel refers to all signal processing circuits between the analog input and the digital
conversion results at DOUT.
Channel Delay
The delay for the analog signal at the ADC input to appear on the digital output. The delay for
the digital value at the DAC input to appear on the analog output.
d
The alpha character
d represents valid programmed or default data in the control register format
(see Section 3.2) when discussing other data bit portions of the register.
Dxx
Dxx is the bit position in the primary data word (xx is the bit number).
DSxx
DSxx is the bit position in the secondary data word (xx is the bit number).
DAC Channel
DAC channel refers to all signal processing circuits between the digital data word applied to DIN
and the differential output analog signal available at OUTP and OUTM.
Data Transfer
Interval
The time during which data is transferred from DOUT and to DIN. The interval is 16 shift clocks
and the data transfer is initiated by the falling edge of the frame-sync signal.
FIR
Finite duration impulse response
fs
The sampling frequency
Frame Sync and
Sampling Period
Frame sync and sampling period is the time between falling edges of successive primary
frame-sync signals. It is always equal to 256 SCLK.
Frame Sync
Frame sync refers only to the falling edge of the signal that initiates the data transfer interval.
The primary frame sync starts the primary communications, and the secondary frame sync
starts the secondary communications.
Frame-Sync
Interval
The frame-sync interval is the time period occupied by 16 shift clocks. The frame-sync signal
goes high on the seventeenth rising edge of SCLK.
Host
A host is any processing system that interfaces to DIN, DOUT, SCLK, FS, and/or MCLK.
PGA
Programmable gain amplifier
Primary
Communications
Primary communications refers to the digital data transfer interval. Since the device is
synchronous, the signal data words from the ADC channel and to the DAC channel occur
simultaneously.
Secondary
Communications
Secondary communications refers to the digital control and configuration data transfer interval
into DIN and the register read data cycle from DOUT. The data transfer interval occurs when
requested by hardware or software.
Signal Data
This refers to the input signal and all of the converted representations through the ADC channel
and the signal through the DAC channel to the analog output. This is contrasted with the purely
digital software control data.
X
The alpha character
X represents a don’t care bit-position within the control register format.
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相关代理商/技术参数 |
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|---|---|
| TLC320AD52CDW | 制造商:TI 制造商全称:Texas Instruments 功能描述:SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION |
| TLC320AD52CPT | 功能描述:IC ANALOG INTERFACE W/MS 48-LQFP RoHS:否 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:PCM 数据接口:PCM 音频接口 分辨率（位）:15 b ADC / DAC 数量:1 / 1 三角积分调变:是 S/N 比，标准 ADC / DAC (db):- 动态范围，标准 ADC / DAC (db):- 电压 - 电源，模拟:2.7 V ~ 3.3 V 电压 - 电源，数字:2.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:80-VFBGA 供应商设备封装:80-BGA MICROSTAR JUNIOR（5x5） 包装:带卷 (TR) 其它名称:296-21257-2 |
| TLC320AD535 | 制造商:TI 制造商全称:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC |
| TLC320AD535C | 制造商:TI 制造商全称:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC |
| TLC320AD535C-I | 制造商:TI 制造商全称:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC |
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