参数资料
型号: TLE6286G
厂商: INFINEON TECHNOLOGIES AG
元件分类: Buffer和线驱动
英文描述: LINE TRANSCEIVER, PDSO16
封装: PLASTIC, SOP-16
文件页数: 23/23页
文件大小: 424K
代理商: TLE6286G
TLE 6286
Preliminary Data Sheet
9
Rev. 1.20, 2005-04-13
until the upper threshold
V
DU is exceeded. If the reset threshold input is connected to
GND, reset is triggered at an output voltage of typ. 4.65 V. A connected microcontroller
will be monitored through the watchdog logic. In case of missing pulses at pin W, the
reset output is set to low. The pulse sequence time can be set in a wide range with the
reset delay capacitor. The IC can be switched at the TTL-compatible, low-active inhibit
input. The IC also incorporates a number of internal circuits for protection against
overload, overtemperature, reverse polarity.
Input Capacitor
The input capacitor
C
I is necessary for compensation of line influences. Using a resistor
of approx. 1
in series with C
I, the oscillating circuit consisting of input inductivity and
input capacitance can be damped. The output capacitor is necessary for the stability of
the regulating circuit. Stability is guaranteed at values
≥ 22 F and an ESR < 3 at
10kHz within the operating temperature range. For small tolerances of the reset delay
the spread of the capacitance of the delay capacitor and its temperature coefficient
should be noted.
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
C
D which can be calculated as follows:
C
D = (trd × ID,ch) / V
(1)
Definitions:
C
D = delay capacitor
t
rd = reset delay time
I
D,ch = charge current, typical 60 A
V = V
DU, typical 1.70 V
V
DU = upper delay switching threshold at CD for reset delay time
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