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| 型号： | TLV320AIC3107IRSBR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 音频／视频放大 |
| 英文描述： | 2 CHANNEL, AUDIO AMPLIFIER, PQCC40 |
| 封装： | 5 X 5 MM, 0.40 MM PITCH, GREEN, PLASTIC, WQFN-40 |
| 文件页数： | 16/99页 |
| 文件大小： | 1474K |
| 代理商： | TLV320AIC3107IRSBR |
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n-1
n-2 n-3
n-1
n-2 n-3
DSP MODE
BCLK
WCLK
0
T0152-01
1/fs
LSB
LSB MSB
MSB
LeftChannel
RightChannel
1
2
SDIN/SDOUT
n–1
n–2
n–3
n–4
n–2
TDM DATA TRANSFER
www.ti.com .............................................................................................................................................. SLOS545C – NOVEMBER 2008 – REVISED MARCH 2009
Figure 20. I2S Serial Data Bus Mode Operation
In DSP mode, the rising edge of the word clock starts the data transfer with the left channel data first and
immediately followed by the right channel data. Each data bit is valid on the falling edge of the bit clock.
Figure 21. DSP Serial Bus Mode Operation
Time-division multiplexed data transfer can be realized in any of the above transfer modes if the 256-clock bit
clock mode is selected, although it is recommended to be used in either left-justified mode or DSP mode. By
changing the programmable offset, the bit clock in each frame where the data begins can be changed, and the
serial data output driver (DOUT) can also be programmed to 3-state during all bit clocks except when valid data
is being put onto the bus. This allows other codecs to be programmed with different offsets and to drive their
data onto the same DOUT line, just in a different slot. For incoming data, the codec simply ignores data on the
bus except where it is expected based on the programmed offset.
Note that the location of the data when an offset is programmed is different, depending on what transfer mode is
selected. In DSP mode, both left and right channels of data are transferred immediately adjacent to each other in
the frame. This differs from left-justified mode, where the left and right channel data will always be a half-frame
apart in each frame. In this case, as the offset is programmed from zero to some higher value, both the left and
right channel data move across the frame, but still stay a full half-frame apart from each other. This is depicted in
Figure 22 for the two cases.
Copyright 2008–2009, Texas Instruments Incorporated
23
Product Folder Link(s): TLV320AIC3107
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相关代理商/技术参数 |
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| TLV320AIC3107IRSBT | 功能描述:接口—CODEC Low Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC3107IYZFR | 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC3107IYZFT | 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC3107YZFR | 制造商:TI 制造商全称:Texas Instruments 功能描述:LOW-POWER STEREO CODEC WITH INTEGRATED MONO CLASS-D SPEAKER AMPLIFIER |
| TLV320AIC3110 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Low-Power Audio Codec With Audio Procsessing and Stereo Class-D Speaker Amplifier |
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