参数资料
型号: TLV320AIC3111IRHBT
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: AUDIO AMPLIFIER, PQCC32
封装: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件页数: 1/156页
文件大小: 1701K
代理商: TLV320AIC3111IRHBT
www.ti.com
SLAS644B – JULY 2009 – REVISED OCTOBER 2009
Low-Power Audio Codec With Embedded miniDSP
and Stereo Class-D Speaker Amplifier
Check for Samples: TLV320AIC3111
1
INTRODUCTION
1.1
Features
1.2
Applications
1234
Stereo Audio DAC With 95-dB SNR
Portable Audio Devices
Mono Audio ADC With 91-dB SNR
Mobile Internet Devices
Supports 8-kHz to 192-kHz SepArate DAC and
Adaptive Filtering Applications
ADC Sample Rates
Instruction-Programmable Embedded miniDSP
1.3
Description
Stereo 1.29-W Class-D BTL 8-
Speaker Driver
With Direct Battery Connection
The
TLV320AIC3111
is
a
low-power,
highly
integrated, high-performance codec which provides a
One Differential and Three Single-Ended Inputs
With Mixing and Level Control
stereo audio DAC and mono audio ADC.
Microphone With Bias, Preamp PGA, and AGC
The TLV320AIC3111 features a high-performance
Built-in Digital Audio Processing Blocks With
audio
codec
with
16-bit
stereo
playback
and
User-Programmable Biquad and FIR Filters
monaural record functionality. The device integrates
Digital Mixing Capability
several analog features, such as a microphone
Programmable Digital Audio Processor for
interface, headphone drivers, and speaker drivers.
Bass Boost/Treble/EQ With up to Five Biquads
for Record and up to Six Biquads for Playback
The TLV320AIC3111 has a fully programmable
miniDSP for digital audio processing. The digital
Pin Control or Register Control for
Digital-Playback Volume-Control Settings
audio data format is programmable to work with
Sine-Wave Generator for Beep
popular
audio
standard
protocols
(I2S,
left/right-justified) in master, slave, DSP, and TDM
Integrated PLL Used for Programmable Digital
Audio Processor
modes. Bass boost, treble, or EQ can be supported
by the programmable digital signal-processing block.
I2S, Left-Justified, Right-Justified, DSP, and
TDM Audio Interfaces
An on-chip PLL provides the high-speed clock
I2C Control With Register Auto-Increment
needed by the digital signal processing block. The
Full Power-Down Control
volume level can be controlled by either pin control or
Power Supplies:
by register control. The audio functions are controlled
– Analog: 2.7 V–3.6 V
using the I2C serial bus.
– Digital Core: 1.65 V–1.95 V
The TLV320AIC3111 has a programmable beep
– Digital I/O: 1.1 V–3.6 V
generator and is available in a 32-pin QFN package.
– Class-D: 2.7 V–5.5V (SPLVDD and SPRVDD
AVDD)
5-mm × 5-mm 32-QFN Package
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PurePath is a trademark of Texas Instruments.
3
MATLAB is a trademark of The MathWorks, Inc.
4
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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