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参数资料
| 型号： | TLV320AIC3111IRHBT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 音频／视频放大 |
| 英文描述： | AUDIO AMPLIFIER, PQCC32 |
| 封装： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件页数： | 147/156页 |
| 文件大小： | 1701K |
| 代理商： | TLV320AIC3111IRHBT |
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SLAS644B – JULY 2009 – REVISED OCTOBER 2009
www.ti.com
Page 0 / Register 46: Interrupt Flags – DAC
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R
0
0: No short circuit detected at HPL/left class-D driver
1: Short circuit detected at HPL/left class-D driver
D6
R
0
0: No short circuit detected at HPR/right class-D driver
1: Short circuit detected at HPR/right class-D driver
D5
R
X
0: No headset button pressed
1: Headset button pressed
D4
R
X
0: Headset removal detected
1: Headset insertion detected
D3
R
0
0: Left DAC signal power is below signal threshold of DRC.
1: Left DAC signal power is above signal threshold of DRC.
D2
R
0
0: Right DAC signal power is below signal threshold of DRC.
1: Right DAC signal power is above signal threshold of DRC.
D1
R
0
DAC miniDSP Engine Standard Interrupt Port Output
0: Read a 0 from Standard Interrupt-Port
1: Raed a 1 from Standard Interrupt-Port
D0
R
0
DAC miniDSP Engine Auxiliary Interrupt Port Output
0: Read a 0 from Auxilliary Interrupt-Port
1: Read a 1 from Auxilliary Interrupt-Port
Page 0 / Register 47: Interrupt Flags – ADC
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
Reserved
D6
R
0
0: Delta-sigma mono ADC signal power greater than noise threshold for left AGC
1: Delta-sigma mono ADC signal power less than noise threshold for left AGC
D5
R/W
0
Reserved
D4
R
X
ADC miniDSP Engine Standard Interrupt Port Output
0: Read a 0 from Standard Interrupt-Port
1: Raed a 1 from Standard Interrupt-Port
D3
R
X
ADC miniDSP Engine Auxiliary Interrupt Port Output
0: Read a 0 from Auxilliary Interrupt-Port
1: Read a 1 from Auxilliary Interrupt-Port
D2
R
0
0: DC measurement using Delta Sigma Audio ADC is not available
1: DC measurement using Delta Sigma Audio ADC is not available
D1–D0
R/W
00
Reserved. Write only zeros to these bits.
Page 0 / Register 48: INT1 Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Headset-insertion detect interrupt is not used in the generation of INT1 interrupt.
1: Headset-insertion detect interrupt is used in the generation of INT1 interrupt.
D6
R/W
0
0: Button-press detect interrupt is not used in the generation of INT1 interrupt.
1: Button-press detect interrupt is used in the generation of INT1 interrupt.
D5
R/W
0
0: DAC DRC signal-power interrupt is not used in the generation of INT1 interrupt.
1: DAC DRC signal-power interrupt is used in the generation of INT1 interrupt.
D4
R/W
0
0: ADC AGC noise interrupt is not used in the generation of INT1 interrupt.
1: ADC AGC noise interrupt is used in the generation of INT1 interrupt.
D3
R/W
0
0: Short-circuit interrupt is not used in the generation of INT1 interrupt.
1: Short-circuit interrupt is used in the generation of INT1 interrupt.
D2
R/W
0
0: Engine-generated interrupt is not used in the generation of INT1 interrupt.
1: Engine-generated interrupt is used in the generation of INT1 interrupt.
D1
R/W
0
0: DC measurement using Delta Sigma Audio ADC data-available interrupt is not used in the generation
of INT1 interrupt
1: DC measurement using Delta Sigma Audio ADC data-available interrupt is used in the generation of
INT1 interrupt
D0
R/W
0
0: INT1 is only one pulse (active-high) of typical 2-ms duration.
1: INT1 is multiple pulses (active-high) of typical 2-ms duration and 4-ms period, until flag registers 44
and 45 are read by the user.
90
REGISTER MAP
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3111
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