参数资料
型号: TLV320AIC3107IYZFT
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 2 CHANNEL, AUDIO AMPLIFIER, BGA42
封装: 3.50 X 3 MM, 0.50 MM PITCH, GREEN, DSBGA-42
文件页数: 62/99页
文件大小: 1474K
代理商: TLV320AIC3107IYZFT
www.ti.com .............................................................................................................................................. SLOS545C – NOVEMBER 2008 – REVISED MARCH 2009
Table 5. Output Stage Volume Control Settings and Gains (continued)
Gain Setting
Analog Gain
Gain Setting
Analog Gain
Gain Setting
Analog Gain
Gain Setting
Analog Gain
(dB)
27
-13.5
57
-28.6
87
-43.8
117
-78.3
28
-14.0
58
-29.1
88
-44.3
118–127
Mute
29
-14.5
59
-29.6
89
-44.8
Page 0 / Register 45:
LINE2L to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
LINE2L Output Routing Control
0: LINE2L is not routed to HPLOUT
1: LINE2L is routed to HPLOUT
D6-D0
R/W
0000000
LINE2L to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 46:
PGA_L to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_L Output Routing Control
0: PGA_L is not routed to HPLOUT
1: PGA_L is routed to HPLOUT
D6-D0
R/W
0000000
PGA_L to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 47:
DAC_L1 to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
DAC_L1 Output Routing Control
0: DAC_L1 is not routed to HPLOUT
1: DAC_L1 is routed to HPLOUT
D6-D0
R/W
0000000
DAC_L1 to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 48:
LINE2R to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
LINE2R Output Routing Control
0: LINE2R is not routed to HPLOUT
1: LINE2R is routed to HPLOUT
D6-D0
R/W
0000000
LINE2R to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 49:
PGA_R to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_R Output Routing Control
0: PGA_R is not routed to HPLOUT
1: PGA_R is routed to HPLOUT
D6-D0
R/W
0000000
PGA_R to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Copyright 2008–2009, Texas Instruments Incorporated
65
Product Folder Link(s): TLV320AIC3107
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