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参数资料
型号： TLV320AIC3107IYZFT
厂商： TEXAS INSTRUMENTS INC
元件分类： 音频／视频放大
英文描述： 2 CHANNEL, AUDIO AMPLIFIER, BGA42
封装： 3.50 X 3 MM, 0.50 MM PITCH, GREEN, DSBGA-42
文件页数： 91/99页
文件大小： 1474K
代理商： TLV320AIC3107IYZFT
Audio Serial Bus Interface
MIC3L/LINE1RM
ADC
L
+
HPCOM
DAC
L
DIN
DOUT
BCLK
WCLK
DIN
L
DI
NR
DOUTL
DOUTR
AGC
SW-D2
SW-D1
I2C Serial
Control Bus
GP
IO
1
SCL
SD
A
/RESET
Voltage Supplies
DVDD
DR
VD
D
DR
VS
S
DVSS
IOVDD
A
VSS_ADC
AV
D
_
D
A
C
A
VSS_DAC
HPROUT
MIC3R/LINE2RM
PGA
0/+59.5dB
0.5dB steps
+
DAC
R
Volume
Control
SW-D3
SW-D4
LINE2RP
LINE1RP
LINE2RP/LINE2LM
LINE2LP
MICDET/LINE1LM
LINE1LP
HPLOUT
(R51)
+
(R48)
(R46)
(R49)
(R45)
(R50)
(R47)
HPLOUT Volume
(0 to -78dB)
DAC_L1
DAC_R1
LINE2L
LINE2R
PGA_L
PGA_R
DAC_L2
VCM
+
(R55)
(R53)
(R56)
(R52)
(R57)
(R54)
DAC_L1
DAC_R1
LINE2L
LINE2R
PGA_L
PGA_R
(R58)
Volume
Control
1
st Ord
deemp
LB1
LB2
1
st Ord
deemp
RB1
RB2
PGA
0/+59.5dB
0.5dB steps
+
(R62)
(R60)
(R63)
(R59)
(R64)
(R61)
DAC_L1
DAC_R1
LINE2L
LINE2R
PGA_L
PGA_R
DAC_R2
+
(R83)
(R81)
(R84)
(R80)
(R85)
(R82)
DAC_L1
DAC_R1
LINE2L
LINE2R
PGA_L
PGA_R
+
(R90)
(R88)
(R91)
(R87)
(R92)
(R89)
DAC_L1
LINE2L
LINE2R
PGA_R
DAC_R1
PGA_L
DAC_L1
Normal Left Channel Processing
Normal Right Channel Processing
ADC
R
HPCOM
Drive Ctrl
(R37)
DAC
Pwr(R37)
HPCOM Volume (0
to -78dB)
HPROUT Volume
(0 to -78dB)
LEFT_LOP Volume
(0 to -78dB)
PGA_R
PGA_L
LINE2R
LINE2L
DAC_L2
DAC_L3
DAC_R3
DAC_L3
(R65)
RIGHT_LOP Volume
(0 to -78dB)
LB1
To enable Record-Only Digital Audio Processing
(shown with SW-Dx):
1. Power Down Both DACs (R37)
2. Enable ADC Digital Processing (R107)
3. 3-D Processing not available in record mode
(R41)
RB2
LB2
Atten
+
-
+
-
1
st
Ord
1
st
Ord
L Ch
R Ch
3-D Digital Audio Processing
Normal Processing and 3-D Processing are
mutually exclusive. (R8-D2, 3-D Control)
(R8-D2)
R8-D2
Bypass (R12-D3)
Bypass (R12-D2)
Bypass (R12-D1)
Bypass (R12,D0)
(P1:R1-R6,
R13-R16)
(P1:R7-R12,
R17-R20)
(P1:R21-R16)
(R43)
(P1:R27-R32,
R39-R42)
(P1:R33-R38,
R43-R46)
(P1:R47-R52)
P1:R53-R54
All register numbers are
in decimal and in Page 0 unless
otherwise noted
DAC_R1
DAC_R2
DAC_R3
Left AGC Control:
(R26-R28,R32,R34,
R103-R104)
Right AGC Control:
(R29-R31,R33,R35,
R105-R106)
DAC_L2
Gain:
0 to +9 dB
SW-Lx and SW-Rx
See Register R108
TLV320AIC3107IRSB Functional Block Diagram with Registers (ver. 0.95)
(R15)
(R16)
LINE2L
MIC3L
LINE1L
LINE1R
MIC3R
LINE2R
(R20)
Gain:
0 to -12 dB
6.0dB steps
(R19,
R24)
(R21,
R22)
(R17,
R18)
(R23)
(R44)
Gain:
0 to -12 dB
1.5dB steps
Gain:
0 to -12 dB
1.5dB steps
Gain:
0 to -12 dB
1.5dB steps
Gain:
0 to -12 dB
6.0dB steps
Gain:
0 to -12 dB
1.5dB steps
Gain:
0 to -63.5dB
0.5dB steps
Gain:
0 to -63.5dB
0.5dB steps
39
40
33
13
22
21
11
32
2
31
1
DRVDD
16
18
7
8
6
4
3
37
38
35
36
14
15
17
Pin numbers shown for QFN-40 Package
(Ordering Number TLV320AIC3107IRSB)
All output Volume
Gains are in 0.5dB steps
All output Gains
are positive in 1dB steps
(R17,
R18)
1
st
Order
HP
Filter
(R12,D7-6)
(P1:R65-R70)
1
st
Order
HP
Filter
(R12,D5-4)
(P1:R71-R76)
Gain:
0 to +9 dB
Gain:
0 to +9 dB
(R107,D7)
(R107,D6)
MICBIAS and
Digital Mic
Ctrl = (R25)
I2C Status = (R107)
DAC Current
Ctrl (R109)
Left ADC Pwr
Ctrl (R19-D2)
Right ADC Pwr
Ctrl (R22-D2)
Sample Rate Select = (R2)
Software Reset
Reg = (R1)
Audio Serial Data Interface
Ctrl = (R8-R10)
Codec Data path Setup = (R7)
Relevant App Notes:
1. Out-of-Band Noise Measurement Issues for Audio Codecs (SLAA313)
2. 3. The Built-In AGC Function (SLAA260)
4. Using AIC3x with TDM Support (SLAA311)
0
1
0
1
0
1
0
Status Registers:
1. SC,BP,AGC, etc.(Sticky Int) – R96
2. SC,BP,AGC, etc.(Realtime Int) – R97
3. ADC Flags – R36
LINE2L Bypass
Path Control (R40)
LINE2R Bypass
Path Control (R40)
High Power Output
Stage Control: R40
MICBIAS
Mic
Control
10
5
9
SPOM
Class-D
Speaker
Amplifier
26
AV
DD_ADC
12
Reset
Control
Left ADC Dither (R76)
Right ADC Dither (R76)
Class-D Gain (R73-D7-D6)
Class-D Enable
(R73-D3)
Gain:
0 to +18 dB
6.0dB steps
AGC
LINE2RM
LINE2RP
LINE1RP
LINE1RM
MICDET
MICBIAS
LINE1LP
LINE1LM
LINE2LP
LINE2LM
MIC3L
MIC3R
Audio
Clock
Generation
MC
LK
34
PLL Regs
= (R3-R6)
LEFT_LOM
SPVDDL
SPVSS
L
25
24
SWOUTP
SWOUTM
29
28
SW
INP
SW
INM
27
30
Power Supplies
Bypass Switch
(R73-D1)
Bypass Switch
Bootstrap
Clock Enable
(R73-D0)
SPOP
23
+6dB
LINE1LP
LINE2LM
LINE2LP
LINE1LM
SW-L0
SW-L3
SW-L1
SW-L4
SW-L5
LEFT_LOP
(R86)
19
Gain:
0 to +9 dB
LEFT_LOP
LINE2LM
LINE1LM
LINE1RP
LINE2RP
SW-R0
SW-R1
SW-R2
RIGHT_LOP
(R93)
20
Gain:
0 to +9 dB
(Internal Signal)
LINE1RM
LINE2RM
相关PDF资料
PDF描述
TLV320AIC3107IRSBT 2 CHANNEL, AUDIO AMPLIFIER, PQCC40
TLV320AIC3107IRSBR 2 CHANNEL, AUDIO AMPLIFIER, PQCC40
TLV320AIC3107YZFR 2 CHANNEL, AUDIO AMPLIFIER, PBGA42
TLV320AIC3110IRHBR AUDIO AMPLIFIER, PQCC32
TLV320AIC3110IRHBT AUDIO AMPLIFIER, PQCC32
相关代理商/技术参数
参数描述
TLV320AIC3107YZFR 制造商:TI 制造商全称:Texas Instruments 功能描述:LOW-POWER STEREO CODEC WITH INTEGRATED MONO CLASS-D SPEAKER AMPLIFIER
TLV320AIC3110 制造商:TI 制造商全称:Texas Instruments 功能描述:Low-Power Audio Codec With Audio Procsessing and Stereo Class-D Speaker Amplifier
TLV320AIC3110EVM-U 功能描述:音频 IC 开发工具 TLV320AIC3110EVM-U Eval Mod RoHS:否 制造商:Texas Instruments 产品:Evaluation Kits 类型:Audio Amplifiers 工具用于评估:TAS5614L 工作电源电压:12 V to 38 V
TLV320AIC3110IRHBR 功能描述:接口—CODEC Low-Pwr Audio Codec RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel
TLV320AIC3110IRHBT 功能描述:接口—CODEC Low-Pwr Audio Codec RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel
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