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参数资料
| 型号： | TLV320AIC32IRHBRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封装： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件页数： | 56/80页 |
| 文件大小： | 1270K |
| 代理商： | TLV320AIC32IRHBRG4 |
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SLAS479C – AUGUST 2005 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
At 25°C, AVDD, DRVDD, IOVDD = 3.3 V, DVDD = 1.8 V, Fs = 48-kHz, 16-bit audio data (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AUDIO DAC
Differential Line output, load = 10 k
, 50 pF
1.414
VRMS
0-dB gain to line outputs. DAC output common-mode
Full-scale differential output voltage
setting = 1.35 V, output level control gain = 0-dB
4.0
VPP
Fs = 48 kHz, 0-dB gain to line outputs, zero signal
Signal-to-noise ratio, A-weighted(3)
90
100
dB
applied, referenced to full-scale input level
Fs = 48 kHz, 0-dB gain to line outputs,
Dynamic range, A-weighted
100
dB
1 kHz –60 dB signal applied
Total harmonic distortion
Fs = 48 kHz, 1 kHz 0 dB input signal applied
–93
–75
dB
Power supply rejection ratio
234 Hz, 100 mVpp on AVDD, DRVDD1/2
81
dB
DAC channel separation (left to right)
1-kHz, 0-dB
–100
dB
DAC interchannel gain mismatch
1 kHz input, 0dB gain
0.1
dB
DAC Gain Error
1 kHz input, 0dB gain
–0.4
dB
DAC DIGITAL INTERPOLATION
Fs = 48-kHz
FILTER
Passband
High-pass filter disabled
0.45×Fs
Hz
Passband ripple
High-pass filter disabled
±0.06
dB
Transition band
0.45×Fs
0.55×Fs
Hz
Stopband
0.55×Fs
7.5×Fs
Hz
Stopband attenuation
65
dB
Group delay
21/Fs
Sec
STEREO HEADPHONE DRIVER
AC-coupled output configuration(3)
0-dB gain to high power outputs. Output
0-dB full-scale output voltage
0.707
VRMS
common-mode voltage setting = 1.35 V
First option
1.35
Programmable output common mode
Second option
1.50
voltage (applicable to Line Outputs
V
Third option
1.65
also)
Fourth option
1.8
Maximum programmable output level
9
dB
control gain
Programmable output level control
1
dB
gain step size
RL = 32
15
PO
Maximum output power
mW
RL = 16
30
Signal-to-noise ratio, A-weighted(4)
94
dB
–77
1-kHz output, PO = 5 mW, RL = 32
0.014
–76
1-kHz output, PO = 10 mW, RL = 32
0.016
Total harmonic distortion
dB%
–73
1-kHz output, PO = 10 mW, RL = 16
0.022
–71
1-kHz output, PO = 20 mW, RL = 16
0.028
Channel separation
1 kHz, 0 dB input
90
dB
Power supply rejection ratio
217 Hz, 100 mVpp on AVDD, DRVDD1/2
48
dB
Mute attenuation
1-kHz output
107
dB
(3)
Unless otherwise noted, all measurements use output common-mode voltage setting of 1.35 V, 0-dB output level control gain, 16-
single-ended load.
(4)
Ratio of output level with a 1-kHz full-scale input, to the output level playing an all-zero signal, measured A-weighted over a 20-Hz to
20-kHz bandwidth.
6
Copyright 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC32
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