参数资料
型号: TLV320AIC32IRHB
厂商: TEXAS INSTRUMENTS INC
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封装: 5 X 5 MM, PLASTIC, QFN-32
文件页数: 1/76页
文件大小: 1124K
代理商: TLV320AIC32IRHB
BurrBrown Products
from Texas Instruments
FEATURES
DESCRIPTION
SLAS479B – AUGUST 2005 – REVISED AUGUST 2006
LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
Stereo Audio DAC
The TLV320AIC32 is a low-power stereo-audio
codec with a stereo headphone amplifier, as well as
– 100 dB A Signal-to-Noise Ratio
multiple
inputs
and
outputs,
programmable
in
– 16/20/24/32-Bit Data
single-ended
or
fully-differential
configurations.
– Supports Rates From 8 kHz to 96 kHz
Extensive register-based power control is included,
– 3D/Bass/Treble/EQ/De-Emphasis Effects
enabling stereo 48-kHz DAC playback as low as 14
mW from a 3.3-V analog supply, making it ideal for
Stereo Audio ADC
portable,
battery-powered
audio
and
telephony
– 92 dB A Signal-to-Noise Ratio
applications.
– Supports Rates From 8 kHz to 96 kHz
The record path of the TLV320AIC32 contains
Six Audio Input Pins
integrated
microphone
bias,
digitally-controlled
– Six Stereo Single-Ended Inputs
stereo-microphone pre-amp, and automatic gain
control (AGC), with mix/mux capability among the
Six Audio Output Drivers
multiple analog inputs. The playback path includes
– Stereo 8-
, 500 mw/Channel Speaker Drive
mix/mux capability from the stereo DAC and selected
Capability
inputs, through programmable volume controls, to
the various outputs.
– Stereo Fully-Differential or Single-Ended
Headphone Drivers
The TLV320AIC32 contains four high-power output
– Fully Differential Stereo Line Outputs
drivers as well as two fully differential output drivers.
The high-power output drivers are capable of driving
Low Power: 14-mW Stereo, 48-kHz Playback
a variety of load configurations, including up to four
With 3.3-V Analog Supply
channels of single-ended 16-
headphones using
Programmable Input/Output Analog Gains
ac-coupling capacitors, or stereo 16-
headphones
Automatic Gain Control (AGC) for Record
in a cap-less output configuration. In addition, pairs
of drivers can be used to drive 8-
speakers in a
Programmable Microphone Bias Level
BTL configuration at 500 mW per channel.
Programmable PLL for Flexible Clock
The stereo audio DAC supports sampling rates from
Generation
8 kHz to 96 kHz and includes programmable digital
I2C Control Bus
filtering in the DAC path for 3D, bass, treble,
Audio Serial Data Bus Supports I2S,
midrange
effects,
speaker
equalization,
and
Left/Right-Justified, DSP, and TDM Modes
de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz rates.
The stereo-audio ADC supports sampling rates from
Extensive Modular Power Control
8 kHz to 96 kHz and is preceded by programmable
Power Supplies:
gain amplifiers providing up to +59.5 dB analog gain
– Analog: 2.7 V – 3.6 V
for low-level microphone inputs.
– Digital Core: 1.525 V – 1.95 V
The serial control bus supports the I2C protocol,
– Digital I/O: 1.1 V – 3.6 V
while the serial-audio data bus is programmable for
I2S, left/right justified, DSP, or TDM modes. A highly
Available Packages: 5
× 5 mm, 32-Pin QFN
programmable PLL is included for flexible clock
generation and support for all standard audio rates
from a wide range of available MCLKs, varying from
512 kHz to 50 MHz, with special attention paid to the
most popular cases of 12 MHz, 13 MHz, 16 MHz,
19.2 MHz, and 19.68 MHz system clocks.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2005–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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