- 您现在的位置：买卖IC网 > PDF目录98254 > TLV320AIC32IRHB (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQCC32 PDF资料下载
参数资料
| 型号： | TLV320AIC32IRHB |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封装： | 5 X 5 MM, PLASTIC, QFN-32 |
| 文件页数： | 17/76页 |
| 文件大小： | 1124K |
| 代理商： | TLV320AIC32IRHB |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页
www.ti.com
STEREO AUDIO ADC
SLAS479B – AUGUST 2005 – REVISED AUGUST 2006
OVERVIEW (continued)
The table below lists several example cases of typical MCLK rates and how to program the PLL to achieve Fsref
= 44.1 kHz or 48 kHz.
Fsref = 44.1 kHz
MCLK (MHz)
P
R
J
D
ACHIEVED FSREF
% ERROR
2.8224
1
32
0
44100.00
0.0000
5.6448
1
16
0
44100.00
0.0000
12.0
1
7
5264
44100.00
0.0000
13.0
1
6
9474
44099.71
0.0007
16.0
1
5
6448
44100.00
0.0000
19.2
1
4
7040
44100.00
0.0000
19.68
1
4
5893
44100.30
–0.0007
48.0
4
1
7
5264
44100.00
0.0000
Fsref = 48 kHz
MCLK (MHz)
P
R
J
D
ACHIEVED FSREF
% ERROR
2.048
1
48
0
48000.00
0.0000
3.072
1
32
0
48000.00
0.0000
4.096
1
24
0
48000.00
0.0000
6.144
1
16
0
48000.00
0.0000
8.192
1
12
0
48000.00
0.0000
12.0
1
8
1920
48000.00
0.0000
13.0
1
7
5618
47999.71
0.0006
16.0
1
6
1440
48000.00
0.0000
19.2
1
5
1200
48000.00
0.0000
19.68
1
4
9951
47999.79
0.0004
48.0
4
1
8
1920
48000.00
0.0000
The TLV320AIC32 includes a stereo audio ADC, which uses a delta-sigma modulator with 128-times
oversampling in single-rate mode, followed by a digital decimation filter. The ADC supports sampling rates from
8 kHz to 48 kHz in single-rate mode, and up to 96 kHz in dual-rate mode. Whenever the ADC or DAC is in
operation, the device requires an audio master clock be provided and appropriate audio clock generation be
setup within the part.
In order to provide optimal system power dissipation, the stereo ADC can be powered one channel at a time, to
support the case where only mono record capability is required. In addition, both channels can be fully powered
or entirely powered down.
The integrated digital decimation filter removes high-frequency content and downsamples the audio data from an
initial sampling rate of 128 Fs to the final output sampling rate of Fs. The decimation filter provides a linear
phase output response with a group delay of 17/Fs. The –3 dB bandwidth of the decimation filter extends to 0.45
Fs and scales with the sample rate (Fs). The filter has minimum 75dB attenuation over the stopband from 0.55
Fs to 64 Fs. Independent digital highpass filters are also included with each ADC channel, with a corner
frequency that can be independently set to three different settings or can be disabled entirely.
Because of the oversampling nature of the audio ADC and the integrated digital decimation filtering,
requirements for analog anti-aliasing filtering are very relaxed. The TLV320AIC32 integrates a second order
analog anti-aliasing filter with 20-dB attenuation at 1 MHz. This filter, combined with the digital decimation filter,
provides sufficient anti-aliasing filtering without requiring additional external components.
The ADC is preceded by a programmable gain amplifier (PGA), which allows analog gain control from 0 dB to
59.5 dB in steps of 0.5 dB. The PGA gain changes are implemented with an internal soft-stepping algorithm that
only changes the actual volume level by one 0.5-dB step every one or two ADC output samples, depending on
the register programming (see registers Page-0/Reg-19 and 22). This soft-stepping ensures that volume control
changes occur smoothly with no audible artifacts. On reset, the PGA gain defaults to a mute condition, and upon
24
相关PDF资料 |
PDF描述 |
|---|---|
| TLV320AIC33IGQER | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| TLV320AIC33IGQE | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| TLV320AIC33IRGZR | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| TLV320AIC33IZQER | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| TLV320AIC33IZQE | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV320AIC32IRHBG4 | 制造商:Texas Instruments 功能描述:AUD CODEC 2ADC / 2DAC 32BIT 32QFN EP - Rail/Tube |
| TLV320AIC32IRHBR | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC32IRHBRG4 | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC32IRHBT | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC32IRHBTG4 | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。