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参数资料
型号： TLV320AIC32IRHB
厂商： TEXAS INSTRUMENTS INC
元件分类： 消费家电
英文描述： SPECIALTY CONSUMER CIRCUIT, PQCC32
封装： 5 X 5 MM, PLASTIC, QFN-32
文件页数： 58/76页
文件大小： 1124K
代理商： TLV320AIC32IRHB
www.ti.com
TLV320AIC32
SLAS479B – AUGUST 2005 – REVISED AUGUST 2006
Page 0 / Register 91:
PGA_R to RIGHT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_R Output Routing Control
0: PGA_R is not routed to RIGHT_LOP/M
1: PGA_R is routed to RIGHT_LOP/M
D6-D0
R/W
0000000
PGA_R to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Page 0 / Register 92:
DAC_R1 to RIGHT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
DAC_R1 Output Routing Control
0: DAC_R1 is not routed to RIGHT_LOP/M
1: DAC_R1 is routed to RIGHT_LOP/M
D6-D0
R/W
0000000
DAC_R1 to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Page 0 / Register 93:
RIGHT_LOP/M Output Level Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D4
R/W
0000
RIGHT_LOP/M Output Level Control
0000: Output level control = 0-dB
0001: Output level control = 1-dB
0010: Output level control = 2-dB
...
1000: Output level control = 8-dB
1001: Output level control = 9-dB
1010–1111: Reserved. Do not write these sequences to these register bits.
D3
R/W
0
RIGHT_LOP/M Mute
0: RIGHT_LOP/M is muted
1: RIGHT_LOP/M is not muted
D2
R/W
0
Reserved. Write only zero to this register bit.
D1
R
1
RIGHT_LOP/M Volume Control Status
0: Not all programmed gains to RIGHT_LOP/M have been applied yet
1: All programmed gains to RIGHT_LOP/M have been applied
D0
R/W
0
RIGHT_LOP/M Power Control
0: RIGHT_LOP/M is not fully powered up
1: RIGHT_LOP/M is fully powered up
Page 0 / Register 94:
Module Power Status Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R
0
Left DAC Power Status
0: Left DAC not fully powered up
1: Left DAC fully powered up
D6
R
0
Right DAC Power Status
0: Right DAC not fully powered up
1: Right DAC fully powered up
D5
R
0
Reserved. Write only zero to this bit.
D4
R
0
LEFT_LOP/M Power Status
0: LEFT_LOP/M output driver powered down
1: LEFT_LOP/M output driver powered up
D3
R
0
RIGHT_LOP/M Power Status
0: RIGHT_LOP/M is not fully powered up
1: RIGHT_LOP/M is fully powered up
D2
R
0
HPLOUT Driver Power Status
0: HPLOUT Driver is not fully powered up
1: HPLOUT Driver is fully powered up
61
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