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| 型号： | TLV5580IPWRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封装： | GREEN, PLASTIC, TSSOP-28 |
| 文件页数： | 6/36页 |
| 文件大小： | 478K |
| 代理商： | TLV5580IPWRG4 |
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TLV5580
8BIT, 80 MSPS LOW POWER A/D CONVERTER
SLAS205B DECEMBER 1998 REVISED OCTOBER 2003
www.ti.com
14
PRINCIPLE OF OPERATION
The TLV5580 implements a high-speed 80 MSPS converter in a cost-effective CMOS process. Powered from
3.3 V, the single-pipeline design architecture ensures low-power operation and 8 bit accuracy. Signal input and
clock signals are all single-ended. The digital inputs are 3.3 V TTL / CMOS compatible. Internal voltage
references are included for both bottom and top voltages. Therefore the converter forms a self-contained
solution. Alternatively the user may apply externally generated reference voltages. In doing so, both input offset
and input range can be modified to suit the application.
A high-speed sampling-and-hold captures the analog input signal. Multiple stages will generate the output code
with a pipeline delay of 4.5 CLK cycles. Correction logic combines the multistage data and aligns the 8-bit output
word. All digital logic operates at the rising edge of CLK.
ANALOG INPUT
AIN
CI
S1
RSW
RS
VS
TLV5580
Figure 12. Simplified Equivalent Input Circuit
A first-order approximation for the equivalent analog input circuit of the TLV5580 is shown in Figure 12. The
equivalent input capacitance CI is 4 pF typical. The input must charge/discharge this capacitance within the
sample period of one half clock cycle. When a full-scale voltage step is applied, the input source provides the
charging current through the switch resistance RSW (200 ) of S1 and quickly settles. In this case the input
impedance is low. Alternatively, when the source voltage equals the value previously stored on CI, the hold
capacitor requires no input current and the equivalent input impedance is very high.
To maintain the frequency performance outlined in the specifications, the total source impedance should be
limited to about 80
, as follows from the equation with fCLK = 80 MHz, CI = 4 pF, RSW = 200 :
R
S t
1
÷ 2f
CLK
C
I
In(256) –R
SW
So, for applications running at a lower fCLK, the total source resistance can increase proportionally.
相关PDF资料 |
PDF描述 |
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| TLV5580IDWR | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV5580IPW | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV5580IPWR | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV5580IDWG4 | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV5580CDWG4 | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV5580PW | 制造商:TI 制造商全称:Texas Instruments 功能描述:8-BIT, 80 MSPS LOW-POWER A/D CONVERTER |
| TLV5590 | 制造商:TI 制造商全称:Texas Instruments 功能描述:2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX |
| TLV5590ED | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TLV5590EDR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TLV5590EPWR | 制造商:Texas Instruments 功能描述: |
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