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参数资料
| 型号： | TLV5618ACDG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| 封装： | GREEN, PLASTIC, SOIC-8 |
| 文件页数： | 18/23页 |
| 文件大小： | 633K |
| 代理商： | TLV5618ACDG4 |
TLV5618A
2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT
DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN
SLAS230H – JULY 1999 – REVISED JULY 2002
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDD = 4.5 V to
Fast
1.8
2.5
mA
VDD 4.5 V to
55 V
mA
5.5 V
C&I
Slow
08
1
mA
5.5 V
C & I
Slow
0.8
1
I
Power supply current
No load, All inputs = AGND or
VDD = 2.7 V to
C & I
suffixes
Fast
1.6
2.2
mA
IDD
Power supply current
No load, All in uts = AGND or
VDD DAC latch = All ones
VDD 2.7 V to
33 V
Slow
06
09
mA
IDD
Power su
ly current
VDD, DAC latch = All ones
3.3 V
Slow
0.6
0.9
Fast
18
23
VDD = 2.7 V to
M & Q
Fast
1.8
2.3
mA
VDD 2.7 V to
5.5 V
M & Q
suffixes
Slow
0.8
1
mA
Power down supply current
1
A
PSRR
Power supply rejection ratio
Zero scale, See Note 2
–65
dB
PSRR
Power supply rejection ratio
Full scale,
See Note 3
–65
dB
NOTES:
2. Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) – EZS(VDDmin)/VDDmax]
3. Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) – EG(VDDmin)/VDDmax]
static DAC specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
12
bits
INL
Integral nonlinearity
See Note 4
±2
±4
LSB
DNL
Differential nonlinearity
See Note 5
±0.5
±1
LSB
EZS
Zero-scale error (offset error at zero
scale)
See Note 6
±12
mV
EZS (TC)
Zero-scale-error temperature
coefficient
See Note 7
3
ppm/
°C
C & I suffixes
VDD = 4.5 V – 5.5 V
±0.29
%f ll
EG
Gain error
See Note 8
C & I suffixes
VDD = 2.7 V – 3.3 V
±0.6
% full
scale V
EG
Gain error
See Note 8
M & Q suffixes
VDD = 2.7 V – 5.5 V
±0.6
scale V
EG (TC)
Gain-error temperature coefficient
See Note 9
1
ppm/
°C
NOTES:
4. The relative accuracy of integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum deviation of the output
from the line between zero and full scale, excluding the effects of zero-code and full-scale errors.
5. The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the measured and ideal
1-LSB amplitude change of any two adjacent codes.
6. Zero-scale error is the deviation from zero voltage output when the digital input code is zero.
7. Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) – EZS (Tmin)]/2Vref × 106/(Tmax – Tmin).
8. Gain error is the deviation from the ideal output (2Vref – 1 LSB) with an output load of 10 k.
9. Gain temperature coefficient is given by: EG TC = [EG (Tmax) – Eg (Tmin)]/2Vref × 106/(Tmax – Tmin).
output specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VO
Output voltage range
RL = 10 k
0
VDD–0.4
V
Output load regulation accuracy
VO = 4.096 V, 2.048 V,
RL = 2 k to 10 k
±0.29
% FS
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相关代理商/技术参数 |
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| TLV5618ACDR | 功能描述:数模转换器- DAC 12-Bit 2.5 us Dual DAC Serial Input RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| TLV5618ACDRG4 | 功能描述:数模转换器- DAC 12-Bit 2.5 us Dual DAC Serial Input RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
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| TLV5618AD | 制造商:TI 制造商全称:Texas Instruments 功能描述:2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN |
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